> though I think these only affect the short link between the FPGA and > the vitesse tranceiver anyway, Yep, you've got the right of it. You'll need to tweak the Vitesse PHY through the control interface from software; there is an MDIO interface available, which does work. But we don't have a full datasheet for the part and so can't offer a clear solution for you. There are a LOT of parameters to tweak; not just a generic "RX equalisation" knob like on the Xilinx, for example. I recall a multi-tap filter chain, gain, feedback loops and other trickery on the RX side. So we've just left it on defaults, but it's definitely not optimal.
The Mellanox ASICs are the only ones we've had trouble with (all Broadcom based switches seem to work fine with 3m cables, for example) and Mellanox have a software fix for the issue, by tweaking their own PHY TX parameters. I believe this fix will be in their "General" firmware release soon (though no date has been promised yet). Until then, I suggest you ask for an early-release/testing firmware. Jason
