Drew Weaver wrote on 31/01/2024 14:12:
I know it is not the same but if it can do 1x100GE,1x100GE,1x100GE,1x100GE it would sort of follow that it can do 1x100GE,1x100GE,1x100GE,10x10GE
tbh this will depend on the hardware and how the gearboxes are set up. For example if you had a single ASIC/NPU with 400G forwarding capacity split out into 2x200G, with two gearboxes available on the two southbound paths, that might give you one of: 4x100G (i.e. gearboxes bypassed and 4 separate 100G ports directly connected to the ASIC/NPU), or 2x100G + one gearbox activated / taking all the traffic. The gearbox traffic could then be split out into various combinations of lower speed ports. But because you now have a breakout south of the gearbox, the architecture no longer has the physical capability to provide native 100G ports. Oops.
This isn't necessarily an explanation of what the ASR 9902 is actually doing - it's just an example of how gearbox implementations can lead to unexpected outcomes.
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