[PATCH 4.4 22/45] Revert "MIPS: Lantiq: Fix cascaded IRQ setup"

[Greg Kroah-Hartman]

4.4-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Greg Kroah-Hartman <gre...@linuxfoundation.org>

This reverts commit 6280ac931a23d3fa40cd26057576abcf90a4f22d which is
commit 6c356eda225e3ee134ed4176b9ae3a76f793f4dd upstream.

It shouldn't have been included in a stable release.

Reported-by: Amit Pundir <amit.pun...@linaro.org>
Cc: Felix Fietkau <n...@nbd.name>
Cc: John Crispin <j...@phrozen.org>
Cc: James Hogan <james.ho...@imgtec.com>
Signed-off-by: Greg Kroah-Hartman <gre...@linuxfoundation.org>
---
 arch/mips/lantiq/irq.c |   36 ++++++++++++++++++++----------------
 1 file changed, 20 insertions(+), 16 deletions(-)

--- a/arch/mips/lantiq/irq.c
+++ b/arch/mips/lantiq/irq.c
@@ -269,11 +269,6 @@ static void ltq_hw5_irqdispatch(void)
 DEFINE_HWx_IRQDISPATCH(5)
 #endif
 
-static void ltq_hw_irq_handler(struct irq_desc *desc)
-{
-       ltq_hw_irqdispatch(irq_desc_get_irq(desc) - 2);
-}
-
 #ifdef CONFIG_MIPS_MT_SMP
 void __init arch_init_ipiirq(int irq, struct irqaction *action)
 {
@@ -318,19 +313,23 @@ static struct irqaction irq_call = {
 asmlinkage void plat_irq_dispatch(void)
 {
        unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
-       int irq;
+       unsigned int i;
 
-       if (!pending) {
-               spurious_interrupt();
-               return;
+       if ((MIPS_CPU_TIMER_IRQ == 7) && (pending & CAUSEF_IP7)) {
+               do_IRQ(MIPS_CPU_TIMER_IRQ);
+               goto out;
+       } else {
+               for (i = 0; i < MAX_IM; i++) {
+                       if (pending & (CAUSEF_IP2 << i)) {
+                               ltq_hw_irqdispatch(i);
+                               goto out;
+                       }
+               }
        }
+       pr_alert("Spurious IRQ: CAUSE=0x%08x\n", read_c0_status());
 
-       pending >>= CAUSEB_IP;
-       while (pending) {
-               irq = fls(pending) - 1;
-               do_IRQ(MIPS_CPU_IRQ_BASE + irq);
-               pending &= ~BIT(irq);
-       }
+out:
+       return;
 }
 
 static int icu_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
@@ -355,6 +354,11 @@ static const struct irq_domain_ops irq_d
        .map = icu_map,
 };
 
+static struct irqaction cascade = {
+       .handler = no_action,
+       .name = "cascade",
+};
+
 int __init icu_of_init(struct device_node *node, struct device_node *parent)
 {
        struct device_node *eiu_node;
@@ -386,7 +390,7 @@ int __init icu_of_init(struct device_nod
        mips_cpu_irq_init();
 
        for (i = 0; i < MAX_IM; i++)
-               irq_set_chained_handler(i + 2, ltq_hw_irq_handler);
+               setup_irq(i + 2, &cascade);
 
        if (cpu_has_vint) {
                pr_info("Setting up vectored interrupts\n");