Hi Robin, On Tue, 16 Feb 2021 at 23:10, Robin Murphy <robin.mur...@arm.com> wrote: > > >>> > >>> On Wed, Feb 03, 2021 at 05:07:26PM +0800, Chunyan Zhang wrote: > >>>> From: Chunyan Zhang <chunyan.zh...@unisoc.com> > >>>> > >>>> This iommu module can be used by Unisoc's multimedia devices, such as > >>>> display, Image codec(jpeg) and a few signal processors, including > >>>> VSP(video), GSP(graphic), ISP(image), and CPP(camera pixel processor), > >>>> etc. > >>>> > >>>> Signed-off-by: Chunyan Zhang <chunyan.zh...@unisoc.com> > >>>> --- > >>>> .../devicetree/bindings/iommu/sprd,iommu.yaml | 72 +++++++++++++++++++ > >>>> 1 file changed, 72 insertions(+) > >>>> create mode 100644 > >>>> Documentation/devicetree/bindings/iommu/sprd,iommu.yaml > >>>> > >>>> diff --git a/Documentation/devicetree/bindings/iommu/sprd,iommu.yaml > >>>> b/Documentation/devicetree/bindings/iommu/sprd,iommu.yaml > >>>> new file mode 100644 > >>>> index 000000000000..4fc99e81fa66 > >>>> --- /dev/null > >>>> +++ b/Documentation/devicetree/bindings/iommu/sprd,iommu.yaml > >>>> @@ -0,0 +1,72 @@ > >>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > >>>> +# Copyright 2020 Unisoc Inc. > >>>> +%YAML 1.2 > >>>> +--- > >>>> +$id: http://devicetree.org/schemas/iommu/sprd,iommu.yaml# > >>>> +$schema: http://devicetree.org/meta-schemas/core.yaml# > >>>> + > >>>> +title: Unisoc IOMMU and Multi-media MMU > >>>> + > >>>> +maintainers: > >>>> + - Chunyan Zhang <zhang.l...@gmail.com> > >>>> + > >>>> +properties: > >>>> + compatible: > >>>> + enum: > >>>> + - sprd,iommu-v1 > >>>> + > >>>> + "#iommu-cells": > >>>> + const: 0 > >>>> + description: > >>>> + Unisoc IOMMUs are all single-master IOMMU devices, therefore no > >>>> + additional information needs to associate with its master device. > >>>> + Please refer to the generic bindings document for more details, > >>>> + Documentation/devicetree/bindings/iommu/iommu.txt > >>>> + > >>>> + reg: > >>>> + maxItems: 1 > >>>> + description: > >>>> + Not required if 'sprd,iommu-regs' is defined. > >>>> + > >>>> + clocks: > >>>> + description: > >>>> + Reference to a gate clock phandle, since access to some of IOMMUs > >>>> are > >>>> + controlled by gate clock, but this is not required. > >>>> + > >>>> + sprd,iommu-regs: > >>>> + $ref: /schemas/types.yaml#/definitions/phandle-array > >>>> + description: > >>>> + Reference to a syscon phandle plus 1 cell, the syscon defines the > >>>> + register range used by the iommu and the media device, the cell > >>>> + defines the offset for iommu registers. Since iommu module shares > >>>> + the same register range with the media device which uses it. > >>>> + > >>>> +required: > >>>> + - compatible > >>>> + - "#iommu-cells" > > OK, so apparently the hardware is not quite as trivial as my initial > impression, and you should have interrupts as well.
I've checked with my colleagues for this issue. And like I explained before, one sprd IOMMU serves one master device only, so interrupts are handled by master devices rather than IOMMUs. Chunyan
