> The default behaviour was changed to make it compatible with all cortex-m3 > cores - will have to check but some stm32 and nxp parts had issues using > SYSTEMRESET. > > I think it would be good for openocd to have knowledge of what core can > handle certain reset modes.
We have already gone down this path with success on Cortex A8 where there is a hack for an iMX51 part for the debug offset. This target specific code could either be in OpenOCD or perhaps better in the config files? -- Øyvind Harboe Can Zylin Consulting help on your project? US toll free 1-866-980-3434 / International +47 51 63 25 00 http://www.zylin.com/zy1000.html ARM7 ARM9 ARM11 XScale Cortex JTAG debugger and flash programmer _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
