I’m afraid that this hardware can’t provide autodiscover.

I’m slowly getting through the structure of the sources. If you’d be so kind to 
provide me with the “template“ or list of all things that needs to be adapted, 
you mentioned earlier, I’d be greatful.

Thanks,
Martin


From: Paul Alfille [mailto:paul.alfi...@gmail.com]
Sent: Friday, February 20, 2015 3:32 PM
To: OWFS (One-wire file system) discussion and help
Subject: Re: [Owfs-developers] Add support for additional hardware bus master

Optimally the number of channels should be auto-discovered. I like to make the 
configuration as automatic as possible.

So if the hardware can be safely probed for the number of channels, or 
announces the number of channels, that would be best.

Otherwise a command line option would work.Perhaps:

--rapavybus=0xf0000000:6

The syntax i fairly arbitrary, but it should be relatively intuitive or 
consistent.

Paul

On Fri, Feb 20, 2015 at 7:47 AM, Martin Rapavy 
<martin.rap...@kistler.com<mailto:martin.rap...@kistler.com>> wrote:
Yes, 6 registers in consecutive memory locations (offests 0 .. 5). I suppose we 
need to pass the base address as command line / configuration file parameter.

How does owfs treat channels? Do we need to pass number of channels as command 
line / configuration file parameter as well?

Thanks,
Martin

From: Paul Alfille 
[mailto:paul.alfi...@gmail.com<mailto:paul.alfi...@gmail.com>]
Sent: Friday, February 20, 2015 1:43 PM
To: owfs-developers
Subject: Re: [Owfs-developers] Add support for additional hardware bus master


Do you map the 6 control registers to consecutive memory locations? Would we 
pass that location in a command line option?
On Feb 19, 2015 12:16 PM, "Jan Kandziora" <j...@gmx.de<mailto:j...@gmx.de>> 
wrote:
Am 19.02.2015 um 08:59 schrieb Martin Rapavy:
> Hi Paul,
>
> thanks for briefing me on the architecture of OWFS. My master chip
> has almost exactly the same register interface as Dallas DS1WM
> (http://datasheets.maximintegrated.com/en/ds/DS1WM.pdf). It only
> differs in one register: Clock divisor register (0x04) is missing and
> instead there’s Output Channel Multiplexer register on the same
> address (0x04). This register is used to enable handling of multiple
> channels (1wire busses) by single chip.
>
Ohh, maybe we get native support for DS1WM? Sweeeet!

Kind regards

        Jan

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