that
appears to be what was causing the issue all along.
Thanks for your help,
Mark
On Wed, Jul 5, 2017 at 4:20 PM, Peryer, Mark A. <mark.per...@cfa.harvard.edu
> wrote:
> Hello,
>
> I am still having issues receiving data over 40 GbE. I currently have a
> direct connection betwee
d you select different MAC addresses for the "hardcoded"
>> yellowblocks on the TX and RX side? Else a switch might not forward the
>> packets.
>>
>> 5) Can you ping both 40G interfaces from a computer?
>>
>> Jason Manley
>> CBF Manager
>>
Hello,
I am trying to send data from one SKARAB to another SKARAB over 40GbE. I
have created two separate JASPER files, one for receiving and one for
transmitting. Each design has one forty_gbe yellow block and are configured
similar to Tutorial 2 on the casper website. In the JASPER file used
On Wed, Jun 28, 2017 at 12:33 PM, Peryer, Mark A. <
mark.per...@cfa.harvard.edu> wrote:
> Hello,
>
> There still appears to be an issue with the firmware version loaded onto
> the Virtex 7. As the image below shows, after a power cycle the SKARAB
> boots from the "multi-
Hello,
There still appears to be an issue with the firmware version loaded onto
the Virtex 7. As the image below shows, after a power cycle the SKARAB
boots from the "multi-boot" image. However, once the .fpg file is uploaded,
the Virtex 7 reverts back to using the toolflow image.
Additionally,
> Ill remove that old branch shortly.
>
> Regards
>
> Wes
>
> Wesley New
> South African SKA Project
> +2721 506 7300 <+27%2021%20506%207300>
> www.ska.ac.za
>
>
>
> On Wed, Jun 21, 2017 at 3:46 PM, Peryer, Mark A. <
> mark.per...@cfa.harvard.ed
Hello,
I am currently trying to upload a .fpg file to a SKARAB created with the
jasper_vivado_2016_2 branch (commit 6172a4b) of
https://github.com/ska-sa/mlib_devel. Using the latest version of
casperfpga (commit ec0c355) from the devel branch,
https://github.com/ska-sa/casperfpga/tree/devel, I
and no longer responds
>>>> on Ethernet at all. We now need a way to bring it back to life from a
>>>> straight off the factory floor state. We surmise this involves JTAG and
>>>> while there is a tantalizing mention of this protocol in the docs Adam
>>>
Hello,
After trying to reconfigure the flash memory on the Virtex7 FPGA with a new
image, I am no longer able to connect to the SKARAB through casperfpga
using the 1GigE port. When I enter the command fpga =
casperfpga.SkarabFpga('169.254.128.213'), the following is output.
Hello,
I am currently trying to find a way to load the .bof file generated from
JASPER onto a SKARAB. Does a library such as corr, that is used for the
ROACH2, exist for the SKARAB, or is there some other method that needs to
be used?
Thanks,
Mark
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