Re: [casper] QSH I/O as single ended signal.

hi indrajit, for single ended output --- as matt points out, because the Vccio pins for these banks is hardwired to 2.5 volts, the single ended output voltage will be 0 to 2.5 volts and is not programmable. for single ended input -- if

Re: [casper] QSH I/O as single ended signal.

, Indrajit Vittal Barve wrote: Date: Tue, 11 Jul 2017 21:02:39 +0530 From: Indrajit Vittal Barve <indra...@iiap.res.in> To: Matt Dexter <mdex...@berkeley.edu>, CASPER Mailing List <casper@lists.berkeley.edu> Subject: Re: [casper] QSH I/O as single ended signal. Thanks Matt

Re: [casper] QSH I/O as single ended signal.

Thanks Matt dexter, I also got the same page and bank details. But I am looking for the single ended usage. With thanks and regards Indrajit On 11 Jul 2017 8:48 p.m., Matt Dexter wrote:Hi, I've never used the QSH signals as single ended IO. Page 12 of The Roach1

Re: [casper] QSH I/O as single ended signal.

Hi, I've never used the QSH signals as single ended IO. Page 12 of The Roach1 Schematics shows the source of the QSH_A/B_D_P/N signals as FPGA IO banks 3, 11, 13, 15, 17, 19, 21 page 4 shows those banks powered at 2V5 aka 2.5VDC. The 2V5 signal is hardwired to the VCCIO pins; there is no