[casper] Error with mmcm

2015-02-12 Thread Nishanth Shivashankaran
Hi All, I am trying to create a yellow block for the roach2 with the MUSIC adc/dac, I replaced the DCM with the MMCM. I compiled the DAC and ADC portion separately. The DAC portion seems to work without any errors and I was able to put out tones and i visually saw it on the spectrum analyzer

[casper] VHDL black-boxing (lack of existing documentation)

2015-02-12 Thread James Smith
Hello all, I've been trying to move away from such big heavy models, my ultimate goal being to have VHDL black boxes instead of precompiled ones made from Xilinx or Casper DSP blocks. Jack Hickish's HDL Black Box Tutorial ( https://casper.berkeley.edu/wiki/Tutorial_HDL_Black_Box) demonstrates a

[casper] about complex FFT core problem

2015-02-12 Thread Wang Jinqing
Hello, I have tried to the complex FFT core . During the simulation,the system generator give out the error as below: Slice endpoints must lie between the LSB and MSB Error occurred during Rate and Type Error Checking. Maybe the input now is not correct,because I have connect the real_pfb's

Re: [casper] about complex FFT core problem

2015-02-12 Thread Andrew Martens
Hi Wang This error occurs when you have a data bus and are trying to use part of it that does not exist. This means that a Slice block is expecting a wider data bus than your design is giving it. For the FFT it may be that the shift input does not have the correct width, or possibly your data

[casper] DRAM on ROACH2?

2015-02-12 Thread Brad Dober
Hi Casperites, Has anyone implemented the DDR3 DRAM on ROACH2 with a PPC interface? I saw some whispers of work on a DRAM yellow block for ROACH2 by Juan Pierre in 2013 on the mail archive, but I don't think there was ever a PPC interface ever built. (Some mention of a MIG was made, but I'm not

Re: [casper] DRAM on ROACH2?

2015-02-12 Thread Juan-Pierre Jansen van Rensburg
Hi Brad I only had time work on the FPGA interface to the DDR3 DRAM... for our application the CPU interface was more of a nice to have. The only other person that I know of who might have done some work on this is Rurik? MIG (Memory Interface Generator) is a Xilinx tool that allows you to

Re: [casper] Error with mmcm

2015-02-12 Thread Wesley New
Hi Nishanth, Clearly your multiply and divide parameters are not what you expect them to be. The VCO frequency, needs to be between 600MHz and 1200MHz. VCO freq equals input freq * Multiply Parameter. Make sure that it falls within the correct range. If you are changing the CASPER tools then you