From: Jean Pihet j-pi...@ti.com
Figures are added to the power domains structs for RET and OFF modes.
Note: the latency figures for MPU, PER, CORE, NEON have been obtained
from actual measurements.
The latency figures for the other power domains are preliminary and
shall be added.
Cf.
Hi Paul,
On Tue, Oct 11, 2011 at 12:52 AM, Paul Walmsley p...@pwsan.com wrote:
On Mon, 10 Oct 2011, Paul Walmsley wrote:
OK. sys_offmode only applies to OFF mode. Voltage scaling can also occur
during RETENTION and INACTIVE (sleep). So were these results with
retention and voltage scaling
Hi Paul,
On Fri, Oct 7, 2011 at 6:17 AM, Paul Walmsley p...@pwsan.com wrote:
Hi Jean
On Wed, 21 Sep 2011, jean.pi...@newoldbits.com wrote:
From: Jean Pihet j-pi...@ti.com
Figures are added to the power domains structs for RET and OFF modes.
Note: the latency figures for MPU, PER, CORE,
Paul,
On Fri, Oct 7, 2011 at 5:26 PM, Paul Walmsley p...@pwsan.com wrote:
Hi Jean
On Wed, 21 Sep 2011, jean.pi...@newoldbits.com wrote:
Figures are added to the power domains structs for RET and OFF modes.
Note: the latency figures for MPU, PER, CORE, NEON have been obtained
from actual
On Mon, 10 Oct 2011, Jean Pihet wrote:
On Fri, Oct 7, 2011 at 6:17 AM, Paul Walmsley p...@pwsan.com wrote:
On Wed, 21 Sep 2011, jean.pi...@newoldbits.com wrote:
From: Jean Pihet j-pi...@ti.com
Figures are added to the power domains structs for RET and OFF modes.
Note: the latency
On Mon, 10 Oct 2011, Paul Walmsley wrote:
OK. sys_offmode only applies to OFF mode. Voltage scaling can also occur
during RETENTION and INACTIVE (sleep). So were these results with
retention and voltage scaling disabled?
This last sentence should have read:
So were these results with
Hi Jean
On Wed, 21 Sep 2011, jean.pi...@newoldbits.com wrote:
Figures are added to the power domains structs for RET and OFF modes.
Note: the latency figures for MPU, PER, CORE, NEON have been obtained
from actual measurements.
The latency figures for the other power domains are
Hi Jean
On Wed, 21 Sep 2011, jean.pi...@newoldbits.com wrote:
From: Jean Pihet j-pi...@ti.com
Figures are added to the power domains structs for RET and OFF modes.
Note: the latency figures for MPU, PER, CORE, NEON have been obtained
from actual measurements.
The latency figures for the
Figures are added to the power domains structs for RET and OFF modes.
Note: the latency figures for MPU, PER, CORE, NEON have been obtained
from actual measurements.
The latency figures for the other power domains are preliminary and
shall be added.
Cf.
From: Jean Pihet j-pi...@ti.com
Figures are added to the power domains structs for RET and OFF modes.
Note: the latency figures for MPU, PER, CORE, NEON have been obtained
from actual measurements.
The latency figures for the other power domains are preliminary and
shall be added.
Cf.
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