[PATCH 8/8] OMAP3: powerdomain data: add wake-up latency figures

2011-10-12 Thread jean . pihet 
From: Jean Pihet j-pi...@ti.com

Figures are added to the power domains structs for RET and OFF modes.

Note: the latency figures for MPU, PER, CORE, NEON have been obtained
from actual measurements.
The latency figures for the other power domains are preliminary and
shall be added.

Cf. http://www.omappedia.org/wiki/Power_Management_Device_Latencies_Measurement
for a detailed explanation on where are the numbers magically coming from.

Tested on OMAP3 Beagleboard in RET/OFF using wake-up latency constraints
on MPU, CORE and PER.

Signed-off-by: Jean Pihet j-pi...@ti.com
---
 arch/arm/mach-omap2/powerdomains3xxx_data.c |   78 +++
 1 files changed, 78 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c 
b/arch/arm/mach-omap2/powerdomains3xxx_data.c
index 469a920..32922bb 100644
--- a/arch/arm/mach-omap2/powerdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c
@@ -31,6 +31,14 @@
 
 /*
  * Powerdomains
+ *
+ * The wakeup_lat values are derived from measurements on
+ * the actual target.
+ *
+ * Note: the latency figures for MPU, PER, CORE, NEON have been obtained
+ * from actual measurements.
+ * The latency figures for the other power domains are preliminary and
+ * shall be added.
  */
 
 static struct powerdomain iva2_pwrdm = {
@@ -52,6 +60,13 @@ static struct powerdomain iva2_pwrdm = {
[2] = PWRSTS_OFF_ON,
[3] = PWRSTS_ON,
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 1100,
+   [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_CSWR] = 350,
+   [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_ON] = 0,
+   },
 };
 
 static struct powerdomain mpu_3xxx_pwrdm = {
@@ -68,6 +83,13 @@ static struct powerdomain mpu_3xxx_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_OFF_ON,
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 1830,
+   [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_CSWR] = 121,
+   [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_ON] = 0,
+   },
 };
 
 /*
@@ -98,6 +120,13 @@ static struct powerdomain core_3xxx_pre_es3_1_pwrdm = {
[0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
[1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 3082,
+   [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_CSWR] = 153,
+   [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_ON] = 0,
+   },
 };
 
 static struct powerdomain core_3xxx_es3_1_pwrdm = {
@@ -121,6 +150,13 @@ static struct powerdomain core_3xxx_es3_1_pwrdm = {
[0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
[1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 3082,
+   [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_CSWR] = 153,
+   [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_ON] = 0,
+   },
 };
 
 static struct powerdomain dss_pwrdm = {
@@ -136,6 +172,13 @@ static struct powerdomain dss_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_ON,  /* MEMONSTATE */
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 70,
+   [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_CSWR] = 20,
+   [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_ON] = 0,
+   },
 };
 
 /*
@@ -157,6 +200,13 @@ static struct powerdomain sgx_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_ON,  /* MEMONSTATE */
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 1000,
+   [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_CSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_ON] = 0,
+   },
 };
 
 static struct powerdomain cam_pwrdm = {
@@ -172,6 +222,13 @@ static struct powerdomain cam_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_ON,  /* MEMONSTATE */
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 850,
+   [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_CSWR] = 35,
+   [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_ON] = 0,
+   },
 };
 
 static struct powerdomain per_pwrdm = {
@@ -187,6 +244,13 @@ static struct powerdomain per_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_ON,  /* MEMONSTATE */
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 671,
+

Re: [PATCH 8/8] OMAP3: powerdomain data: add wake-up latency figures

2011-10-11 Thread Pihet-XID, Jean 
Hi Paul,

On Tue, Oct 11, 2011 at 12:52 AM, Paul Walmsley p...@pwsan.com wrote:
 On Mon, 10 Oct 2011, Paul Walmsley wrote:

 OK.  sys_offmode only applies to OFF mode.  Voltage scaling can also occur
 during RETENTION and INACTIVE (sleep).  So were these results with
 retention and voltage scaling disabled?

 This last sentence should have read:

 So were these results with retention and sleep voltage scaling disabled?
In that case, yes. The scaling timings are only applicable to OFF mode.

I think we need to have a bench setup for the latency measurements.
That way I will be easier to repeat the measurements for next
generation chips and variations.

Regards,
Jean


 - Paul

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Re: [PATCH 8/8] OMAP3: powerdomain data: add wake-up latency figures

2011-10-10 Thread Jean Pihet 
Hi Paul,

On Fri, Oct 7, 2011 at 6:17 AM, Paul Walmsley p...@pwsan.com wrote:
 Hi Jean

 On Wed, 21 Sep 2011, jean.pi...@newoldbits.com wrote:

 From: Jean Pihet j-pi...@ti.com

 Figures are added to the power domains structs for RET and OFF modes.

 Note: the latency figures for MPU, PER, CORE, NEON have been obtained
 from actual measurements.
 The latency figures for the other power domains are preliminary and
 shall be added.

 Cf. 
 http://www.omappedia.org/wiki/Power_Management_Device_Latencies_Measurement
 for a detailed explanation on where are the numbers magically coming from.

 Tested on OMAP3 Beagleboard in RET/OFF using wake-up latency constraints
 on MPU, CORE and PER.

 Do the CSWR measurements include the time for the PMIC to scale the
 voltage, or do they just represent the time to enter and exit clock stop
 (presumably with DPLL idling)?

As described at [1] the measurements have not been performed with
sys_offmode and sys_clkreq signals toggling correctly, because of the
lack of support for it in the kernel.
However the results are including a correction for the sys_offmode
transition time (11.5ms), but no correction for the sys_clkreq signal
(which should be 1ms for sysclk on, 2.5ms for sysclk off).

[1] 
http://www.omappedia.org/wiki/Power_Management_Device_Latencies_Measurement#cpuidle_results

Regards,
Jean



 - Paul

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Re: [PATCH 8/8] OMAP3: powerdomain data: add wake-up latency figures

2011-10-10 Thread Jean Pihet 
Paul,

On Fri, Oct 7, 2011 at 5:26 PM, Paul Walmsley p...@pwsan.com wrote:
 Hi Jean

 On Wed, 21 Sep 2011, jean.pi...@newoldbits.com wrote:

 Figures are added to the power domains structs for RET and OFF modes.

 Note: the latency figures for MPU, PER, CORE, NEON have been obtained
 from actual measurements.
 The latency figures for the other power domains are preliminary and
 shall be added.

 Cf. 
 http://www.omappedia.org/wiki/Power_Management_Device_Latencies_Measurement
 for a detailed explanation on where are the numbers magically coming from.

 Tested on OMAP3 Beagleboard in RET/OFF using wake-up latency constraints
 on MPU, CORE and PER.

 A few more question about these numbers.

 - Are these numbers the ones right off the hardware, or rounded, or
 worst-case plus a certain percentage?
All measurements results are the worst case values right from the
hardware (HW and SW measurements on the target).


 - What frequency/voltage were these measured at?
OPP50


 - Also, you mention OMAP3 Beagleboard.  Is that 34xx or 36xx Beagleboard?
34xx Beagleboard

Cf. 
http://www.omappedia.org/wiki/Power_Management_Device_Latencies_Measurement#cpuidle_results
for the details.

Regards,
Jean


 - Paul

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Re: [PATCH 8/8] OMAP3: powerdomain data: add wake-up latency figures

2011-10-10 Thread Paul Walmsley 
On Mon, 10 Oct 2011, Jean Pihet wrote:

 On Fri, Oct 7, 2011 at 6:17 AM, Paul Walmsley p...@pwsan.com wrote:
  On Wed, 21 Sep 2011, jean.pi...@newoldbits.com wrote:
 
  From: Jean Pihet j-pi...@ti.com
 
  Figures are added to the power domains structs for RET and OFF modes.
 
  Note: the latency figures for MPU, PER, CORE, NEON have been obtained
  from actual measurements.
  The latency figures for the other power domains are preliminary and
  shall be added.
 
  Cf. 
  http://www.omappedia.org/wiki/Power_Management_Device_Latencies_Measurement
  for a detailed explanation on where are the numbers magically coming from.
 
  Tested on OMAP3 Beagleboard in RET/OFF using wake-up latency constraints
  on MPU, CORE and PER.
 
  Do the CSWR measurements include the time for the PMIC to scale the
  voltage, or do they just represent the time to enter and exit clock stop
  (presumably with DPLL idling)?
 
 As described at [1] the measurements have not been performed with
 sys_offmode and sys_clkreq signals toggling correctly, because of the
 lack of support for it in the kernel.
 However the results are including a correction for the sys_offmode
 transition time (11.5ms), but no correction for the sys_clkreq signal
 (which should be 1ms for sysclk on, 2.5ms for sysclk off).
 
 [1] 
 http://www.omappedia.org/wiki/Power_Management_Device_Latencies_Measurement#cpuidle_results

OK.  sys_offmode only applies to OFF mode.  Voltage scaling can also occur 
during RETENTION and INACTIVE (sleep).  So were these results with 
retention and voltage scaling disabled?


- Paul
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Re: [PATCH 8/8] OMAP3: powerdomain data: add wake-up latency figures

2011-10-10 Thread Paul Walmsley 
On Mon, 10 Oct 2011, Paul Walmsley wrote:

 OK.  sys_offmode only applies to OFF mode.  Voltage scaling can also occur 
 during RETENTION and INACTIVE (sleep).  So were these results with 
 retention and voltage scaling disabled?

This last sentence should have read:

So were these results with retention and sleep voltage scaling disabled?

- Paul
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Re: [PATCH 8/8] OMAP3: powerdomain data: add wake-up latency figures

2011-10-07 Thread Paul Walmsley 
Hi Jean

On Wed, 21 Sep 2011, jean.pi...@newoldbits.com wrote:

 Figures are added to the power domains structs for RET and OFF modes.
 
 Note: the latency figures for MPU, PER, CORE, NEON have been obtained
 from actual measurements.
 The latency figures for the other power domains are preliminary and
 shall be added.
 
 Cf. 
 http://www.omappedia.org/wiki/Power_Management_Device_Latencies_Measurement
 for a detailed explanation on where are the numbers magically coming from.
 
 Tested on OMAP3 Beagleboard in RET/OFF using wake-up latency constraints
 on MPU, CORE and PER.

A few more question about these numbers.

- Are these numbers the ones right off the hardware, or rounded, or 
worst-case plus a certain percentage?

- What frequency/voltage were these measured at?

- Also, you mention OMAP3 Beagleboard.  Is that 34xx or 36xx Beagleboard?

 Signed-off-by: Jean Pihet j-pi...@ti.com
 ---
  arch/arm/mach-omap2/powerdomains3xxx_data.c |   78 
 +++
  1 files changed, 78 insertions(+), 0 deletions(-)
 
 diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c 
 b/arch/arm/mach-omap2/powerdomains3xxx_data.c
 index 469a920..32922bb 100644
 --- a/arch/arm/mach-omap2/powerdomains3xxx_data.c
 +++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c
 @@ -31,6 +31,14 @@
  
  /*
   * Powerdomains
 + *
 + * The wakeup_lat values are derived from measurements on
 + * the actual target.
 + *
 + * Note: the latency figures for MPU, PER, CORE, NEON have been obtained
 + * from actual measurements.
 + * The latency figures for the other power domains are preliminary and
 + * shall be added.
   */
  
  static struct powerdomain iva2_pwrdm = {
 @@ -52,6 +60,13 @@ static struct powerdomain iva2_pwrdm = {
   [2] = PWRSTS_OFF_ON,
   [3] = PWRSTS_ON,
   },
 + .wakeup_lat = {
 + [PWRDM_FUNC_PWRST_OFF] = 1100,
 + [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
 + [PWRDM_FUNC_PWRST_CSWR] = 350,
 + [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
 + [PWRDM_FUNC_PWRST_ON] = 0,
 + },
  };
  
  static struct powerdomain mpu_3xxx_pwrdm = {
 @@ -68,6 +83,13 @@ static struct powerdomain mpu_3xxx_pwrdm = {
   .pwrsts_mem_on= {
   [0] = PWRSTS_OFF_ON,
   },
 + .wakeup_lat = {
 + [PWRDM_FUNC_PWRST_OFF] = 1830,
 + [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
 + [PWRDM_FUNC_PWRST_CSWR] = 121,
 + [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
 + [PWRDM_FUNC_PWRST_ON] = 0,
 + },
  };
  
  /*
 @@ -98,6 +120,13 @@ static struct powerdomain core_3xxx_pre_es3_1_pwrdm = {
   [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
   [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
   },
 + .wakeup_lat = {
 + [PWRDM_FUNC_PWRST_OFF] = 3082,
 + [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
 + [PWRDM_FUNC_PWRST_CSWR] = 153,
 + [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
 + [PWRDM_FUNC_PWRST_ON] = 0,
 + },
  };
  
  static struct powerdomain core_3xxx_es3_1_pwrdm = {
 @@ -121,6 +150,13 @@ static struct powerdomain core_3xxx_es3_1_pwrdm = {
   [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
   [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
   },
 + .wakeup_lat = {
 + [PWRDM_FUNC_PWRST_OFF] = 3082,
 + [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
 + [PWRDM_FUNC_PWRST_CSWR] = 153,
 + [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
 + [PWRDM_FUNC_PWRST_ON] = 0,
 + },
  };
  
  static struct powerdomain dss_pwrdm = {
 @@ -136,6 +172,13 @@ static struct powerdomain dss_pwrdm = {
   .pwrsts_mem_on= {
   [0] = PWRSTS_ON,  /* MEMONSTATE */
   },
 + .wakeup_lat = {
 + [PWRDM_FUNC_PWRST_OFF] = 70,
 + [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
 + [PWRDM_FUNC_PWRST_CSWR] = 20,
 + [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
 + [PWRDM_FUNC_PWRST_ON] = 0,
 + },
  };
  
  /*
 @@ -157,6 +200,13 @@ static struct powerdomain sgx_pwrdm = {
   .pwrsts_mem_on= {
   [0] = PWRSTS_ON,  /* MEMONSTATE */
   },
 + .wakeup_lat = {
 + [PWRDM_FUNC_PWRST_OFF] = 1000,
 + [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
 + [PWRDM_FUNC_PWRST_CSWR] = UNSUP_STATE,
 + [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
 + [PWRDM_FUNC_PWRST_ON] = 0,
 + },
  };
  
  static struct powerdomain cam_pwrdm = {
 @@ -172,6 +222,13 @@ static struct powerdomain cam_pwrdm = {
   .pwrsts_mem_on= {
   [0] = PWRSTS_ON,  /* MEMONSTATE */
   },
 + .wakeup_lat = {
 + [PWRDM_FUNC_PWRST_OFF] = 850,
 + [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
 + [PWRDM_FUNC_PWRST_CSWR] = 35,
 + [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
 + [PWRDM_FUNC_PWRST_ON] = 0,
 +

Re: [PATCH 8/8] OMAP3: powerdomain data: add wake-up latency figures

2011-10-06 Thread Paul Walmsley 
Hi Jean

On Wed, 21 Sep 2011, jean.pi...@newoldbits.com wrote:

 From: Jean Pihet j-pi...@ti.com
 
 Figures are added to the power domains structs for RET and OFF modes.
 
 Note: the latency figures for MPU, PER, CORE, NEON have been obtained
 from actual measurements.
 The latency figures for the other power domains are preliminary and
 shall be added.
 
 Cf. 
 http://www.omappedia.org/wiki/Power_Management_Device_Latencies_Measurement
 for a detailed explanation on where are the numbers magically coming from.
 
 Tested on OMAP3 Beagleboard in RET/OFF using wake-up latency constraints
 on MPU, CORE and PER.

Do the CSWR measurements include the time for the PMIC to scale the 
voltage, or do they just represent the time to enter and exit clock stop 
(presumably with DPLL idling)? 


- Paul
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[PATCH 8/8] OMAP3: powerdomain data: add wake-up latency figures

2011-09-21 Thread Jean Pihet 
Figures are added to the power domains structs for RET and OFF modes.

Note: the latency figures for MPU, PER, CORE, NEON have been obtained
from actual measurements.
The latency figures for the other power domains are preliminary and
shall be added.

Cf. http://www.omappedia.org/wiki/Power_Management_Device_Latencies_Measurement
for a detailed explanation on where are the numbers magically coming from.

Tested on OMAP3 Beagleboard in RET/OFF using wake-up latency constraints
on MPU, CORE and PER.

Signed-off-by: Jean Pihet j-pi...@ti.com
---
 arch/arm/mach-omap2/powerdomains3xxx_data.c |   78 +++
 1 files changed, 78 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c 
b/arch/arm/mach-omap2/powerdomains3xxx_data.c
index 469a920..32922bb 100644
--- a/arch/arm/mach-omap2/powerdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c
@@ -31,6 +31,14 @@
 
 /*
  * Powerdomains
+ *
+ * The wakeup_lat values are derived from measurements on
+ * the actual target.
+ *
+ * Note: the latency figures for MPU, PER, CORE, NEON have been obtained
+ * from actual measurements.
+ * The latency figures for the other power domains are preliminary and
+ * shall be added.
  */
 
 static struct powerdomain iva2_pwrdm = {
@@ -52,6 +60,13 @@ static struct powerdomain iva2_pwrdm = {
[2] = PWRSTS_OFF_ON,
[3] = PWRSTS_ON,
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 1100,
+   [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_CSWR] = 350,
+   [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_ON] = 0,
+   },
 };
 
 static struct powerdomain mpu_3xxx_pwrdm = {
@@ -68,6 +83,13 @@ static struct powerdomain mpu_3xxx_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_OFF_ON,
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 1830,
+   [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_CSWR] = 121,
+   [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_ON] = 0,
+   },
 };
 
 /*
@@ -98,6 +120,13 @@ static struct powerdomain core_3xxx_pre_es3_1_pwrdm = {
[0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
[1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 3082,
+   [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_CSWR] = 153,
+   [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_ON] = 0,
+   },
 };
 
 static struct powerdomain core_3xxx_es3_1_pwrdm = {
@@ -121,6 +150,13 @@ static struct powerdomain core_3xxx_es3_1_pwrdm = {
[0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
[1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 3082,
+   [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_CSWR] = 153,
+   [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_ON] = 0,
+   },
 };
 
 static struct powerdomain dss_pwrdm = {
@@ -136,6 +172,13 @@ static struct powerdomain dss_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_ON,  /* MEMONSTATE */
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 70,
+   [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_CSWR] = 20,
+   [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_ON] = 0,
+   },
 };
 
 /*
@@ -157,6 +200,13 @@ static struct powerdomain sgx_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_ON,  /* MEMONSTATE */
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 1000,
+   [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_CSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_ON] = 0,
+   },
 };
 
 static struct powerdomain cam_pwrdm = {
@@ -172,6 +222,13 @@ static struct powerdomain cam_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_ON,  /* MEMONSTATE */
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 850,
+   [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_CSWR] = 35,
+   [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_ON] = 0,
+   },
 };
 
 static struct powerdomain per_pwrdm = {
@@ -187,6 +244,13 @@ static struct powerdomain per_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_ON,  /* MEMONSTATE */
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 671,
+   [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
+

[PATCH 8/8] OMAP3: powerdomain data: add wake-up latency figures

2011-09-21 Thread jean . pihet 
From: Jean Pihet j-pi...@ti.com

Figures are added to the power domains structs for RET and OFF modes.

Note: the latency figures for MPU, PER, CORE, NEON have been obtained
from actual measurements.
The latency figures for the other power domains are preliminary and
shall be added.

Cf. http://www.omappedia.org/wiki/Power_Management_Device_Latencies_Measurement
for a detailed explanation on where are the numbers magically coming from.

Tested on OMAP3 Beagleboard in RET/OFF using wake-up latency constraints
on MPU, CORE and PER.

Signed-off-by: Jean Pihet j-pi...@ti.com
---
 arch/arm/mach-omap2/powerdomains3xxx_data.c |   78 +++
 1 files changed, 78 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c 
b/arch/arm/mach-omap2/powerdomains3xxx_data.c
index 469a920..32922bb 100644
--- a/arch/arm/mach-omap2/powerdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c
@@ -31,6 +31,14 @@
 
 /*
  * Powerdomains
+ *
+ * The wakeup_lat values are derived from measurements on
+ * the actual target.
+ *
+ * Note: the latency figures for MPU, PER, CORE, NEON have been obtained
+ * from actual measurements.
+ * The latency figures for the other power domains are preliminary and
+ * shall be added.
  */
 
 static struct powerdomain iva2_pwrdm = {
@@ -52,6 +60,13 @@ static struct powerdomain iva2_pwrdm = {
[2] = PWRSTS_OFF_ON,
[3] = PWRSTS_ON,
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 1100,
+   [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_CSWR] = 350,
+   [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_ON] = 0,
+   },
 };
 
 static struct powerdomain mpu_3xxx_pwrdm = {
@@ -68,6 +83,13 @@ static struct powerdomain mpu_3xxx_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_OFF_ON,
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 1830,
+   [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_CSWR] = 121,
+   [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_ON] = 0,
+   },
 };
 
 /*
@@ -98,6 +120,13 @@ static struct powerdomain core_3xxx_pre_es3_1_pwrdm = {
[0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
[1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 3082,
+   [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_CSWR] = 153,
+   [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_ON] = 0,
+   },
 };
 
 static struct powerdomain core_3xxx_es3_1_pwrdm = {
@@ -121,6 +150,13 @@ static struct powerdomain core_3xxx_es3_1_pwrdm = {
[0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
[1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 3082,
+   [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_CSWR] = 153,
+   [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_ON] = 0,
+   },
 };
 
 static struct powerdomain dss_pwrdm = {
@@ -136,6 +172,13 @@ static struct powerdomain dss_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_ON,  /* MEMONSTATE */
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 70,
+   [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_CSWR] = 20,
+   [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_ON] = 0,
+   },
 };
 
 /*
@@ -157,6 +200,13 @@ static struct powerdomain sgx_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_ON,  /* MEMONSTATE */
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 1000,
+   [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_CSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_ON] = 0,
+   },
 };
 
 static struct powerdomain cam_pwrdm = {
@@ -172,6 +222,13 @@ static struct powerdomain cam_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_ON,  /* MEMONSTATE */
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 850,
+   [PWRDM_FUNC_PWRST_OSWR] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_CSWR] = 35,
+   [PWRDM_FUNC_PWRST_INACTIVE] = UNSUP_STATE,
+   [PWRDM_FUNC_PWRST_ON] = 0,
+   },
 };
 
 static struct powerdomain per_pwrdm = {
@@ -187,6 +244,13 @@ static struct powerdomain per_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_ON,  /* MEMONSTATE */
},
+   .wakeup_lat = {
+   [PWRDM_FUNC_PWRST_OFF] = 671,
+