Dear Shubhada,
In message 8a71b368a89016469f72cd08050ad33402d57...@maui.asicdesigners.com
you wrote:
I am kind of helpless regarding the kernel version, as our customer is
using it and I need to replicate their environment. I just tried 2.6.28
with katmai_defconfig file and still face the
How will i confirm if PowerPC 7447A processor has or does not have a
dedicated hardware for page table search algorithm?
If it does not have, then which interrupt handler is written for page
address translation mechanism?
-Sumedh
___
Linuxppc-dev
Hi everybody !
I am currently trying to add the support of partitions for the Flash chip on
my MPC8272ADS board (the chips are Sharp LH28F016SCT-L90).
I have added this part:
fl...@0,0 {
compatible = jedec-flash;
reg = 0x0 0x0 0x200;
Thanks for your replies ...
I checked the irq.c and irq.h and found the prototype of
irq_of_parse_and_map() and found from the comment that it is a wrapper
function contains a chain of irq_map_one() and irq_create_mapping()
...
It means that I can use irq_create_mapping() to know the virq also
Jean-Michel Hautbois wrote:
Hi everybody !
I am currently trying to add the support of partitions for the Flash
chip on my MPC8272ADS board (the chips are Sharp LH28F016SCT-L90).
I have added this part:
fl...@0,0 {
compatible = jedec-flash;
2009/2/12 Pieter phenn...@vastech.co.za
Jean-Michel Hautbois wrote:
Warning (reg_format): reg property in
/local...@f0010100/fl...@0,0/partit...@ff80 has invalid length (8
JM
You are missing some definitions, The #address-cells and #size-cells = 1;
tis is a snippet of teh dts i
Nick Piggin wrote:
Actually, that's not the root cause here. You seem to have CONFIG_SMP
disabled but CONFIG_NUMA enabled. That's not possible on x86 which
makes me think it's a ppc kconfig bug. Hmm?
If it is really a valid config, then we should be able to make
slqb build with it...
I
Here is a patch that helped me to get my de2104x NIC working on my
PowerMac 5500. As an interesting side effect, it also made my mesh
module crash.
Background can be found here: http://www.spinics.net/lists/netdev/msg88488.html
Risto
Allow setting NOT_COHERENT_CACHE explicitly.
Signed-off-by:
Hello,
while working on a generic SPI-driver for the i.MX-platform I stumbled
over the following:
The MX1 can flush its FIFOs using the enable bit. Documentation says:
SPI Module Enable - Enables/Disables the serial peripheral interface.
SPIEN must be asserted before an exchange is initiated.
On Thu, Feb 12, 2009 at 12:10:58PM +0100, Jean-Michel Hautbois wrote:
2009/2/12 Pieter phenn...@vastech.co.za
Jean-Michel Hautbois wrote:
Warning (reg_format): reg property in
/local...@f0010100/fl...@0,0/partit...@ff80 has invalid length (8
JM
You are missing some definitions,
2009/2/12 David Gibson da...@gibson.dropbear.id.au
On Thu, Feb 12, 2009 at 12:10:58PM +0100, Jean-Michel Hautbois wrote:
2009/2/12 Pieter phenn...@vastech.co.za
Jean-Michel Hautbois wrote:
Warning (reg_format): reg property in
/local...@f0010100/fl...@0,0/partit...@ff80 has
2009/2/12 Pieter phenn...@vastech.co.za
Jean-Michel Hautbois wrote:
2009/2/12 David Gibson da...@gibson.dropbear.id.au
mailto:da...@gibson.dropbear.id.au
On Thu, Feb 12, 2009 at 12:10:58PM +0100, Jean-Michel Hautbois wrote:
2009/2/12 Pieter phenn...@vastech.co.za
Michael Ellerman wrote:
On Tue, 2009-02-10 at 13:12 -0800, Mike Mason wrote:
I'm resubmitting this patch with a couple changes
suggested by Michael Ellerman. 1) the new functions
should be static, and 2) some people may object to
including unrelated formating changes.
On Thu, 12 Feb 2009, Frederic Weisbecker wrote:
On Wed, Feb 11, 2009 at 08:10:51PM -0500, Steven Rostedt wrote:
The following set of patches are RFC and not for inclusion
(unless everyone is fine with them as is).
This is the port to PowerPC of the function graph tracer that was
On Wed, 11 Feb 2009, Steven Rostedt wrote:
The following set of patches are RFC and not for inclusion
(unless everyone is fine with them as is).
This is the port to PowerPC of the function graph tracer that was written
by Frederic Weisbecker for the x86 architecture. It is broken up
On Thu, Feb 12, 2009 at 11:31:44AM -0500, Steven Rostedt wrote:
On Thu, 12 Feb 2009, Frederic Weisbecker wrote:
On Wed, Feb 11, 2009 at 08:10:51PM -0500, Steven Rostedt wrote:
The following set of patches are RFC and not for inclusion
(unless everyone is fine with them as is).
On Thu, Feb 12, 2009 at 4:51 AM, Vijay Nikam vijay.t.ni...@gmail.com wrote:
Also how I can read the device tree binary file ? ? ?
It would be a lot simpler if you just read the documentation (see
booting-without-of.txt) and looked at other device drivers to see what
they do.
--
Timur Tabi
On Thu, 12 Feb 2009, Frederic Weisbecker wrote:
Yes of course, I knew most of it was architecture independant but I delayed
this TODO for future ports, and you've done it.
Thanks.
Just a micro detail: the ftrace_push/pop_return_trace are parts of
the core of the entry/return probe,
Roel Kluin wrote:
Make id signed so a negative id will get noticed. Error out if
ps3av_auto_videomode() fails.
Signed-off-by: Roel Kluin roel.kl...@gmail.com
---
arch/powerpc/include/asm/ps3av.h |2 +-
drivers/ps3/ps3av.c | 16
2 files changed, 13
Hi Ben,
excuse me for so long time to reply.
Benjamin Herrenschmidt wrote:
This patch rewrites consistent dma allocations support to use vmalloc
layer to allocate virtual memory space from vmalloc pool and get rid
of CONFIG_CONSISTENT_{START,SIZE}.
So as commented before, please drop
On Feb 10, 2009, at 6:26 PM, Kumar Gala wrote:
The Power ISA 2.06 added power of two page sizes to the embedded MMU
architecture. Its done it such a way to be code compatiable with the
existing HW. Made the minor code changes to support both power of two
and power of four page sizes. Also
Hi Wolfgang
I could get 2.6.28 version up and running after using device tree blob.
Also our customer is using Luan and our IT dept ordered Katmai.
So looks like the problem is solved for now (basically my company needs
to look into alternative setups)
Thanks a lot for your prompt help.
This patch rewrites consistent dma allocations support to use vmalloc
layer to allocate virtual memory space from vmalloc pool and get rid
of CONFIG_CONSISTENT_{START,SIZE}.
I still use VM_IOREMAP flag for these allocations (I'll try to post
patch adding separate VM_COHERENT_DMA flag to lkml
On Thu, Feb 12, 2009 at 01:21:24PM -0600, Kumar Gala wrote:
On Feb 10, 2009, at 6:26 PM, Kumar Gala wrote:
The Power ISA 2.06 added power of two page sizes to the embedded MMU
architecture. Its done it such a way to be code compatiable with the
existing HW. Made the minor code changes to
btw, ioremap doesn't provide useful 'caller').
I fixed that :-) (see patches I posted to the list, though that's
waiting for a patch to go upstream first that adds a
__get_vm_area_caller() that I need for ppc64).
Cheers,
Ben.
___
Linuxppc-dev
On Thu, 2009-02-12 at 13:21 -0600, Kumar Gala wrote:
On Feb 10, 2009, at 6:26 PM, Kumar Gala wrote:
The Power ISA 2.06 added power of two page sizes to the embedded MMU
architecture. Its done it such a way to be code compatiable with the
existing HW. Made the minor code changes to
Hi Ben,
Benjamin Herrenschmidt wrote:
btw, ioremap doesn't provide useful 'caller').
I fixed that :-) (see patches I posted to the list, though that's
waiting for a patch to go upstream first that adds a
__get_vm_area_caller() that I need for ppc64).
Yep, I saw them. Btw, I've
On Tue, Feb 10, 2009 at 6:07 AM, Tobias Knutsson
tobias.knuts...@gmail.com wrote:
Hello,
I'm in the process of porting a PCI-driver for a dsp-board from 2.4 to
2.6. The probing of the driver goes well, IRQs are setup, resources
are claimed and remapped without any problems. Reading from I/O
On Feb 12, 2009, at 2:34 PM, Josh Boyer wrote:
On Thu, Feb 12, 2009 at 01:21:24PM -0600, Kumar Gala wrote:
On Feb 10, 2009, at 6:26 PM, Kumar Gala wrote:
The Power ISA 2.06 added power of two page sizes to the embedded MMU
architecture. Its done it such a way to be code compatiable with
I can call it mmu-book3e.h if you think that might enough different to
convey the ISA 2.06 fact that the FSL style MMU is now part of the 3e
architecture.
That's better. book3e is what I've been using internally...
Cheers,
Ben.
___
On Thu, Feb 12, 2009 at 03:26:58PM +0100, Jean-Michel Hautbois wrote:
I think that the problem is in the reg part, but I can't understand why.
Isn't it the RAM mpping of my MTD that is the first address ?
No, it's the offset into the chipselect.
-Scott
Change the PS3 hotplug memory routine ps3_mm_add_memory() from
a core_initcall to a device_initcall.
core_initcall routines run before the powerpc topology_init()
startup routine, which is a subsys_initcall, resulting in
failure of ps3_mm_add_memory() when CONFIG_NUMA=y. When
ps3_mm_add_memory()
From: Dave Hansen d...@linux.vnet.ibm.com
Fix the powerpc NUMA reserve bootmem page selection logic.
commit 8f64e1f2d1e09267ac926e15090fd505c1c0cbcb (powerpc: Reserve
in bootmem lmb reserved regions that cross NUMA nodes) changed
the logic for how the powerpc LMB reserved regions were converted
The Power ISA 2.06 added power of two page sizes to the embedded MMU
architecture. Its done it such a way to be code compatiable with the
existing HW. Made the minor code changes to support both power of two
and power of four page sizes. Also added some new MAS bits and macros
that are defined
The Power ISA 2.06 spec introduces a standard MMU programming model that
is based on the Freescale Book-E MMU programing model. The Freescale
version is pretty backwards compatiable with the ISA 2.06 definition so
we are starting to refactor some of the Freescale code so it can be
easily shared.
The Power ISA 2.06 spec introduces a standard MMU programming model that
is based on the Freescale Book-E MMU programing model. The Freescale
version is pretty backwards compatiable with the ISA 2.06 definition so
we are starting to refactor some of the Freescale code so it can be
easily shared.
On Thu, Feb 12, 2009 at 10:39:36AM -0600, Timur Tabi wrote:
On Thu, Feb 12, 2009 at 4:51 AM, Vijay Nikam vijay.t.ni...@gmail.com wrote:
Also how I can read the device tree binary file ? ? ?
It would be a lot simpler if you just read the documentation (see
booting-without-of.txt) and
arch/powerpc/mm/fsl_booke_mmu.c: In function 'adjust_total_lowmem':
arch/powerpc/mm/fsl_booke_mmu.c:221: warning: format '%ld' expects type 'long
int', but argument 3 has type 'phys_addr_t'
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/mm/fsl_booke_mmu.c |4 ++--
1
This patch rewrites consistent dma allocations support to use vmalloc
layer to allocate virtual memory space from vmalloc pool and get rid
of CONFIG_CONSISTENT_{START,SIZE}.
I still use VM_IOREMAP flag for these allocations (I'll try to post
patch adding separate VM_COHERENT_DMA flag to lkml
On Thu, Feb 12, 2009 at 03:58:15PM -0600, Kumar Gala wrote:
On Feb 12, 2009, at 2:34 PM, Josh Boyer wrote:
On Thu, Feb 12, 2009 at 01:21:24PM -0600, Kumar Gala wrote:
On Feb 10, 2009, at 6:26 PM, Kumar Gala wrote:
The Power ISA 2.06 added power of two page sizes to the embedded MMU
On Thu, 12 Feb 2009, Geoff Levand wrote:
On 02/11/2009 05:10 PM, Steven Rostedt wrote:
This is the port to PowerPC of the function graph tracer that was written
by Frederic Weisbecker for the x86 architecture. It is broken up
into a series of logical steps.
I added these to my
On Thu, Feb 12, 2009 at 06:41:26PM -0500, Steven Rostedt wrote:
On Thu, 12 Feb 2009, Geoff Levand wrote:
On 02/11/2009 05:10 PM, Steven Rostedt wrote:
This is the port to PowerPC of the function graph tracer that was written
by Frederic Weisbecker for the x86 architecture. It is broken up
On 02/12/2009 03:41 PM, Steven Rostedt wrote:
On Thu, 12 Feb 2009, Geoff Levand wrote:
On 02/11/2009 05:10 PM, Steven Rostedt wrote:
This is the port to PowerPC of the function graph tracer that was written
by Frederic Weisbecker for the x86 architecture. It is broken up
into a series
Fix _PAGE_CHG_MASK so that pte_modify() does not affect the _PAGE_SPECIAL bit.
Signed-off-by: Philippe Gerum r...@xenomai.org
--
arch/powerpc/include/asm/pgtable-4k.h|2 +-
arch/powerpc/include/asm/pgtable-64k.h |2 +-
arch/powerpc/include/asm/pgtable-ppc32.h |4 ++--
3
On Thu, 12 Feb 2009, Geoff Levand wrote:
On 02/12/2009 03:41 PM, Steven Rostedt wrote:
On Thu, 12 Feb 2009, Geoff Levand wrote:
On 02/11/2009 05:10 PM, Steven Rostedt wrote:
This is the port to PowerPC of the function graph tracer that was written
by Frederic Weisbecker for the x86
The e500mc supports the new msgsnd/doorbell mechanisms that were added in
the Power ISA 2.05 architecture. We use the normal level doorbell for
doing SMP IPIs at this point.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/include/asm/cputable.h |4 ++-
On Thu, Feb 12, 2009 at 05:51:57PM -0600, Kumar Gala wrote:
On Feb 11, 2009, at 11:40 PM, Li Yang-R58472 wrote:
Li, thanks for heads-up!
One thing though: documentation says that Marvell PHY
address is 0x3,
while old device tree and this patch:
-Original Message-
From: Anton Vorontsov [mailto:avoront...@ru.mvista.com]
Sent: Friday, February 13, 2009 9:18 AM
To: Kumar Gala
Cc: linuxppc-dev list; Li Yang-R58472
Subject: Re: [PATCH] powerpc/83xx: Revive Marvell PHY option
onMPC8313E-RDB rev. C boards
On Thu, Feb 12, 2009
On Thu, 2009-02-12 at 17:54 -0600, Kumar Gala wrote:
The e500mc supports the new msgsnd/doorbell mechanisms that were added in
the Power ISA 2.05 architecture. We use the normal level doorbell for
doing SMP IPIs at this point.
Cool stuff. Haven't reviewed in details yet tho :-) But I was
On Thu, 2009-02-12 at 23:18 +0100, Philippe Gerum wrote:
Fix _PAGE_CHG_MASK so that pte_modify() does not affect the _PAGE_SPECIAL bit.
Signed-off-by: Philippe Gerum r...@xenomai.org
Good catch ! Thanks !
Ben.
--
arch/powerpc/include/asm/pgtable-4k.h|2 +-
On Thu, 2009-02-12 at 13:22 +0200, Risto Suominen wrote:
Here is a patch that helped me to get my de2104x NIC working on my
PowerMac 5500. As an interesting side effect, it also made my mesh
module crash.
Background can be found here:
http://www.spinics.net/lists/netdev/msg88488.html
I'll
On Thu, 2009-02-12 at 13:22 +0200, Risto Suominen wrote:
Here is a patch that helped me to get my de2104x NIC working on my
PowerMac 5500. As an interesting side effect, it also made my mesh
module crash.
Can you tell me more about the mesh crash ? Do you have a log ?
Ben.
On Wed, 2009-02-11 at 20:10 -0500, Steven Rostedt wrote:
+# timers used by tracing
+CFLAGS_REMOVE_time.o = -pg -mno-sched-epilog
endif
That means no tracing of the timer interrupts etc... maybe we should
just move the specific function that we don't want traced out to a
separate file ?
@@ -55,8 +56,9 @@ static unsigned char *ftrace_call_replace(unsigned
long ip, unsigned long addr)
*/
addr = GET_ADDR(addr);
- /* Set to bl addr */
- op = 0x4801 | (ftrace_calc_offset(ip, addr) 0x03fc);
+ /* if (link) set op to 'bl' else 'b' */
+ op
On Fri, 13 Feb 2009, Benjamin Herrenschmidt wrote:
On Wed, 2009-02-11 at 20:10 -0500, Steven Rostedt wrote:
+# timers used by tracing
+CFLAGS_REMOVE_time.o = -pg -mno-sched-epilog
endif
That means no tracing of the timer interrupts etc... maybe we should
just move the specific
For some reason I didn't get 7/7 ...
Cheers,
Ben.
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Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
On Fri, 13 Feb 2009, Benjamin Herrenschmidt wrote:
@@ -55,8 +56,9 @@ static unsigned char *ftrace_call_replace(unsigned
long ip, unsigned long addr)
*/
addr = GET_ADDR(addr);
- /* Set to bl addr */
- op = 0x4801 | (ftrace_calc_offset(ip, addr) 0x03fc);
+
Fix the VSX alignment handler for VSX registers 32. 32-63 are stored
in the VMX part of the thread_struct not the FPR part.
Signed-off-by: Michael Neuling mi...@neuling.org
---
arch/powerpc/kernel/align.c |7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
Index:
On Feb 12, 2009, at 8:46 PM, Benjamin Herrenschmidt wrote:
On Thu, 2009-02-12 at 17:54 -0600, Kumar Gala wrote:
The e500mc supports the new msgsnd/doorbell mechanisms that were
added in
the Power ISA 2.05 architecture. We use the normal level doorbell
for
doing SMP IPIs at this point.
crit doorbell for xmon IPI sounds interesting. However, I don't
following about use of external CRITs for IPIs.
Just a finger not following the brain :-) I meant for NMI's
Cheers,
Ben.
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Linuxppc-dev@ozlabs.org
On Fri, 2009-02-13 at 13:49 +1100, Benjamin Herrenschmidt wrote:
diff --git a/arch/powerpc/include/asm/pgtable-ppc32.h
b/arch/powerpc/include/asm/pgtable-ppc32.h
index 75dded6..8298afc 100644
--- a/arch/powerpc/include/asm/pgtable-ppc32.h
+++ b/arch/powerpc/include/asm/pgtable-ppc32.h
There seems to be some magic force linked to this mailing list.
Whenever I post a question, the matter seems to resolve itself. :)
In order to stay as consistent as possible with the old 2.4 kernel, I
used the same mapping that they had:
0x5000 - 0x60 for memory
0x6000 -
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