Re: [Mesa-dev] [PATCH 2/5] i965/vec4: adding vec4_cmod_propagation optimization

On Sat, Oct 10, 2015 at 4:24 AM, Alejandro Piñeiro wrote: > vec4 port of fs_cmod_propagation. > > Shader-db results: > total instructions in shared programs: 6241226 -> 6224469 (-0.27%) > instructions in affected programs: 498213 -> 481456 (-3.36%) > helped:

[Mesa-dev] [PATCH v2 18/17 (was 10/17)] i965/vs: Move use_legacy_snorm_formula into the shader key

This is really an input into the shader compiler so it kind of makes sense in the key. Also, given where it's placed into the key, it doesn't actually make it any bigger. v2 (Jason Ekstrand): - Rebase on top of the compiler clean-ups so the affects of this patch can better be studied

Re: [Mesa-dev] [PATCH 3/8] radeonsi: Enable DCC.

On 10/10/2015 17:49, Marek Olšák wrote: On Sat, Oct 10, 2015 at 4:15 PM, Bas Nieuwenhuizen wrote: Hi Marek, The revised series is mostly done. I wanted to do more testing and to try to make sure that the added cache flushes I am doing now (a CACHE_FLUSH event before

Re: [Mesa-dev] [PATCH 3/8] radeonsi: Enable DCC.

On Sat, Oct 10, 2015 at 6:12 PM, Axel Davy wrote: > On 10/10/2015 17:49, Marek Olšák wrote: >> >> On Sat, Oct 10, 2015 at 4:15 PM, Bas Nieuwenhuizen >> wrote: >>> >>> Hi Marek, >>> >>> The revised series is mostly done. I wanted to do more testing and

Re: [Mesa-dev] [PATCH 3/6] glsl: move half<->float convertion to util

On Sat, Oct 10, 2015 at 3:09 PM, Matt Turner wrote: > On Sat, Oct 10, 2015 at 11:47 AM, Rob Clark wrote: >> From: Rob Clark >> >> Needed in NIR too, so move out of mesa/main/imports.c >> >> Signed-off-by: Rob Clark

Re: [Mesa-dev] [Nouveau] [PATCH] nv50, nvc0: don't base decisions on available pushbuf space

On Sat, Oct 10, 2015 at 3:41 PM, Samuel Pitoiset wrote: > This patch looks fine except that it should be a bit more normalized. I > mean, sometimes you break when PUSH_SPACE fails, sometimes not. Same for > PUSH_SPACE calls, sometimes you add it sometimes not. Meh. We

Re: [Mesa-dev] [PATCH 1/5] i965/vec4: nir_emit_if doesn't need to predicate based on all the channels

Looking at the docs a bit, it looks like we should never have been using predicate_normal for if's in the first place Reviewed-by: Jason Ekstrand On Sat, Oct 10, 2015 at 4:24 AM, Alejandro Piñeiro wrote: > --- > > I already talked about this with

Re: [Mesa-dev] [PATCH 3/8] radeonsi: Enable DCC.

On Sat, Oct 10, 2015 at 5:49 PM, Marek Olšák wrote: > On Sat, Oct 10, 2015 at 4:15 PM, Bas Nieuwenhuizen > wrote: >> Hi Marek, >> >> The revised series is mostly done. I wanted to do more testing and to >> try to make sure that the added cache flushes

[Mesa-dev] Mesa 11.0.3

Mesa 11.0.3 is now available. In the current release we have a bunch of EGL patches, mangledGL build fixes and a healthy amount of driver bugfixes - radeonsi, nouveau, i915 and i965. Last but not least, the KDE/Weston regression introduced with 11.0.2 has also been resolved. Brian Paul (1):

[Mesa-dev] [Bug 92361] [BSW SKL] Regression: glx@glx-copy-sub-buffer failed

https://bugs.freedesktop.org/show_bug.cgi?id=92361 cprigent changed: What|Removed |Added Summary|[BSW] Regression: |[BSW SKL]

[Mesa-dev] [Bug 92368] [BSW] Regression: glx@glx_arb_sync_control@timing -fullscreen test Fail

https://bugs.freedesktop.org/show_bug.cgi?id=92368 --- Comment #1 from cprigent --- Reproduced on SKL-Y. Following tests were Pass with Mesa 10.6.4: glx@glx_arb_sync_control@timing -divisor 1 glx@glx_arb_sync_control@timing -fullscreen -msc-delta 1

[Mesa-dev] [PATCH] i965/vec4: Implement b2f and b2i using negation.

Curro added this in commit 3ee2daf23d (before the vec4/NIR backend was added) but it was missed in the new NIR backend. Add it there as well. instructions in affected programs: 1857 -> 1810 (-2.53%) helped:15 --- src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 8

Re: [Mesa-dev] [Nouveau] [PATCH] nv50, nvc0: don't base decisions on available pushbuf space

On Sat, Oct 10, 2015 at 3:55 PM, Samuel Pitoiset wrote: > > > On 10/10/2015 09:42 PM, Ilia Mirkin wrote: >> >> On Sat, Oct 10, 2015 at 3:41 PM, Samuel Pitoiset >> wrote: >>> >>> This patch looks fine except that it should be a bit more

Re: [Mesa-dev] [PATCH 3/8] radeonsi: Enable DCC.

Hi Marek, The revised series is mostly done. I wanted to do more testing and to try to make sure that the added cache flushes I am doing now (a CACHE_FLUSH event before a fast clear and on switching framebuffers) are the minimal needed. > Also, it looks like we don't need DCC decompression at

[Mesa-dev] [PATCH] nir/glsl: Use shader_prog->Name for naming the NIR shader

This has the better name to use. Aparently, sh->Name is usually 0. --- src/glsl/nir/glsl_to_nir.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/glsl/nir/glsl_to_nir.cpp b/src/glsl/nir/glsl_to_nir.cpp index 6e1dd84..3284bdc 100644 --- a/src/glsl/nir/glsl_to_nir.cpp +++

Re: [Mesa-dev] [PATCH v2 12/17] i965/vs: Rework vs_emit to take a nir_shader and a brw_compiler

I reworked this patch to patch use_legacy_snorm_formula through as a function argument rather than trying to go through the key. This should make landing this series independent of finding strange meta-related gpu hangs on HSW. I reworked the patch to move use_legacy_snorm_formula into the key

Re: [Mesa-dev] [PATCH] nouveau: avoid emitting new fences unnecessarily

Does this fix those texelFetch piglit tests ? Or is it the second patch ? Anyway, this patch is : Reviewed-by: Samuel Pitoiset On 10/10/2015 08:12 AM, Ilia Mirkin wrote: Right now we emit on every kick, but this is only necessary if something will ever be able to

Re: [Mesa-dev] [Nouveau] [PATCH] nv50, nvc0: don't base decisions on available pushbuf space

This patch looks fine except that it should be a bit more normalized. I mean, sometimes you break when PUSH_SPACE fails, sometimes not. Same for PUSH_SPACE calls, sometimes you add it sometimes not. Did you run a full piglit test this time ? :) See my comment below. On 10/10/2015 11:09 AM,

Re: [Mesa-dev] [PATCH 11/17] i965/fs: Rework wm_fs_emit to take a nir_shader and a brw_compiler

Ignore this. It's just an accidental re-send. On Sat, Oct 10, 2015 at 8:04 AM, Jason Ekstrand wrote: > This commit removes all dependence on GL state by getting rid of the > brw_context parameter and the GL data structures. > --- > src/mesa/drivers/dri/i965/brw_fs.cpp |

[Mesa-dev] [PATCH v2 12/17] i965/vs: Rework vs_emit to take a nir_shader and a brw_compiler

This commit removes all dependence on GL state by getting rid of the brw_context parameter and the GL data structures. v2 (Jason Ekstrand): - Patch use_legacy_snorm_formula through as a function argument rather than trying to go through the shader key. ---

Re: [Mesa-dev] [PATCH 3/8] radeonsi: Enable DCC.

On Sat, Oct 10, 2015 at 4:15 PM, Bas Nieuwenhuizen wrote: > Hi Marek, > > The revised series is mostly done. I wanted to do more testing and to > try to make sure that the added cache flushes I am doing now (a > CACHE_FLUSH event before a fast clear and on switching

Re: [Mesa-dev] [PATCH V4 2/6] glsl: assign hidden uniforms their slot id earlier

Hi Timothy, One of these 3 commits breaks compilation for Talos shaders with gallium. My piglit patch "glsl-1.30/sampler-bug: ..." contains a minimal test case. I can't say which commit, because Mesa fails to build between them. It has something to do with uniforms, structures, and samplers.

Re: [Mesa-dev] [PATCH 1/5] i965/vec4: nir_emit_if doesn't need to predicate based on all the channels

On Sat, Oct 10, 2015 at 4:24 AM, Alejandro Piñeiro wrote: > --- > > I already talked about this with Jason Ekstrand and Matt Turner > privately, but just in case somebody else jump to the review: > > When using BRW_PREDICATE_NORMAL, the if will use all the channels of > the

Re: [Mesa-dev] [PATCH 3/6] glsl: move half<->float convertion to util

On Sat, Oct 10, 2015 at 11:47 AM, Rob Clark wrote: > From: Rob Clark > > Needed in NIR too, so move out of mesa/main/imports.c > > Signed-off-by: Rob Clark > --- > src/glsl/Makefile.am | 1 + >

Re: [Mesa-dev] [PATCH] i965/vec4: Implement b2f and b2i using negation.

Matt Turner writes: > Curro added this in commit 3ee2daf23d (before the vec4/NIR backend was > added) but it was missed in the new NIR backend. Add it there as well. > > instructions in affected programs: 1857 -> 1810 (-2.53%) > helped:15 >

Re: [Mesa-dev] [Nouveau] [PATCH] nv50, nvc0: don't base decisions on available pushbuf space

On 10/10/2015 09:42 PM, Ilia Mirkin wrote: On Sat, Oct 10, 2015 at 3:41 PM, Samuel Pitoiset wrote: This patch looks fine except that it should be a bit more normalized. I mean, sometimes you break when PUSH_SPACE fails, sometimes not. Same for PUSH_SPACE calls,

[Mesa-dev] [PATCH 11/17] i965/fs: Rework wm_fs_emit to take a nir_shader and a brw_compiler

This commit removes all dependence on GL state by getting rid of the brw_context parameter and the GL data structures. --- src/mesa/drivers/dri/i965/brw_fs.cpp | 59 src/mesa/drivers/dri/i965/brw_wm.c | 14 +++-- src/mesa/drivers/dri/i965/brw_wm.h | 13

Re: [Mesa-dev] [PATCH 0/6] Remove NIR dependency on GLSL

On Sat, Oct 10, 2015 at 2:47 PM, Rob Clark wrote: > From: Rob Clark > > This patchset removes the NIR dependency on GLSL (and includes resend > of shader_enums cleanups w/ addition of STATIC_ASSERT()'s) > > Split up glsl_types so the builtin-types

Re: [Mesa-dev] [PATCH] nouveau: avoid emitting new fences unnecessarily

On Sat, Oct 10, 2015 at 3:41 PM, Samuel Pitoiset wrote: > Does this fix those texelFetch piglit tests ? Or is it the second patch ? This patch "fixes" the initial texelFetch piglit failures. However it creates some fresh texelFetch piglit failures -- that test is

[Mesa-dev] [PATCH 12/17] i965/vs: Rework vs_emit to take a nir_shader and a brw_compiler

This commit removes all dependence on GL state by getting rid of the brw_context parameter and the GL data structures. --- src/mesa/drivers/dri/i965/brw_vec4.cpp | 67 +- src/mesa/drivers/dri/i965/brw_vs.c | 14 ++- src/mesa/drivers/dri/i965/brw_vs.h |

[Mesa-dev] [PATCH 1/6] glsl: couple shader_enums cleanups

From: Rob Clark Add missing enum to gl_system_value_name() and move VARYING_SLOT_MAX / FRAG_RESULT_MAX / etc into shader_enums.h as suggested by Emil. v2: add STATIC_ASSERT()'s Reported-by: Emil Velikov Signed-off-by: Rob Clark

[Mesa-dev] [PATCH 3/6] glsl: move half<->float convertion to util

From: Rob Clark Needed in NIR too, so move out of mesa/main/imports.c Signed-off-by: Rob Clark --- src/glsl/Makefile.am | 1 + src/mesa/main/imports.c | 148 -- src/mesa/main/imports.h | 38

[Mesa-dev] [PATCH 2/6] glsl: move builtin types to glsl_types.cpp

From: Rob Clark First step at untangling NIR's dependency on glsl_types without bringing in the dependency on glsl_symbol_table. The builtin types are now in glsl_types (which will end up in NIR), but adding them to the symbol- table stays in builtin_types.cpp (which

[Mesa-dev] [PATCH 0/6] Remove NIR dependency on GLSL

From: Rob Clark This patchset removes the NIR dependency on GLSL (and includes resend of shader_enums cleanups w/ addition of STATIC_ASSERT()'s) Split up glsl_types so the builtin-types go w/ glsl_types but the parts that add them to glsl_symbol_table stay with glsl.

[Mesa-dev] [PATCH 6/6] glsl: (mostly) remove libglsl_util

From: Rob Clark Now that NIR does not depend on glsl, we can (mostly[*]) get rid of the libglsl_util hack. [*] glsl_compiler is the one remaining user of libglsl_util Signed-off-by: Rob Clark --- src/gallium/drivers/freedreno/Makefile.am

[Mesa-dev] [PATCH 4/6] nir: use util/convert.h

From: Rob Clark Signed-off-by: Rob Clark --- src/glsl/nir/nir_constant_expressions.py | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/glsl/nir/nir_constant_expressions.py

[Mesa-dev] [PATCH 09/10] radeonsi: cleanup copy-pasted scratch buffer updates

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_state_shaders.c | 39 + 1 file changed, 13 insertions(+), 26 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c index

[Mesa-dev] [PATCH 01/10] tgsi: move pipe_shader_from_tgsi_processor function to util

From: Marek Olšák --- src/gallium/auxiliary/tgsi/tgsi_ureg.c | 26 ++ src/gallium/auxiliary/util/u_inlines.h | 22 ++ 2 files changed, 24 insertions(+), 24 deletions(-) diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.c

[Mesa-dev] [PATCH 05/10] radeonsi: remove an unused ctx parameter in si_shader_destroy

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_compute.c | 4 ++-- src/gallium/drivers/radeonsi/si_shader.c| 4 ++-- src/gallium/drivers/radeonsi/si_shader.h| 2 +- src/gallium/drivers/radeonsi/si_state_shaders.c | 2 +- 4 files changed, 6

[Mesa-dev] [PATCH 04/10] radeonsi: print export_prim_id from the shader key

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_shader.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 109a805..789b1b7 100644 ---

[Mesa-dev] [PATCH 07/10] radeonsi: unify shader delete functions

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_state_shaders.c | 84 + 1 file changed, 17 insertions(+), 67 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c index

[Mesa-dev] [PATCH 02/10] radeonsi: cleanup si_llvm_init_export_args

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_shader.c | 76 ++-- 1 file changed, 34 insertions(+), 42 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 32a702f..109a805

[Mesa-dev] [PATCH 00/10] RadeonSI cleanups

Nothing special here other than cleanups. One patch disables NaNs for LS and HS, and there's also one GS shader leak fix. Please review. Marek ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org

[Mesa-dev] [PATCH 03/10] radeonsi: disable NaNs for LS and HS

From: Marek Olšák They're disabled for all other shaders except compute, but I forgot to do this for tess stages. --- src/gallium/drivers/radeonsi/si_state_shaders.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git

[Mesa-dev] [PATCH 06/10] radeonsi: fix a GS copy shader leak

From: Marek Olšák Cc: mesa-sta...@lists.freedesktop.org --- src/gallium/drivers/radeonsi/si_shader.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index

[Mesa-dev] [PATCH 10/10] radeonsi: cleanup other scratch buffer functions

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_state_shaders.c | 23 --- 1 file changed, 8 insertions(+), 15 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c index

[Mesa-dev] [PATCH 08/10] radeonsi: unify shader create functions

From: Marek Olšák The shader specifies the processor type, so use that instead. --- src/gallium/drivers/radeonsi/si_state_shaders.c | 49 + 1 file changed, 9 insertions(+), 40 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c

[Mesa-dev] [PATCH 07/10] radeonsi: don't use the AMDGPU intrinsic for CMP

From: Marek Olšák The increase in VGPRs in unfortunate, but the decrease in the scratch size is always welcome. Totals: SGPRS: 344552 -> 344368 (-0.05 %) VGPRS: 197132 -> 197552 (0.21 %) Code Size: 7375376 -> 7366304 (-0.12 %) bytes LDS: 91 -> 91 (0.00 %) blocks Scratch:

[Mesa-dev] [PATCH 10/10] radeonsi: really enable the no-nans-fp-math option

From: Marek Olšák Include compute shaders too, which includes OpenGL, but not OpenCL. LLVM doesn't use this much according to shader-db: Totals: SGPRS: 344944 -> 344944 (0.00 %) VGPRS: 197024 -> 197024 (0.00 %) Code Size: 7325688 -> 7325624 (-0.00 %) bytes LDS: 91 -> 91

[Mesa-dev] [PATCH 00/10] RadeonSI: Better LLVM IR generation

Hi, This patch series improves IR generation for radeonsi. Most of it removes uses of AMDGPU intrinsics. There is one piglit regression caused by aggressive handling of "undef" in LLVM, breaking piglit/glsl-routing. I have a lit test which I'll send later. Complete stats from shader-db are

[Mesa-dev] [PATCH 08/10] radeonsi: re-enable unsafe-fp-math for LLVM 3.8

From: Marek Olšák Required for 1/sqrt ==> rsq. We should finally fix the hang instead of running away from the issue. This assumes the bug is in LLVM and we have time to fix it before the release. Include compute shaders as well, which only affects TGSI and thus OpenGL.

[Mesa-dev] [PATCH 09/10] radeonsi: don't emit AMDGPU intrinsics for RSQ opcodes

From: Marek Olšák Intel and Nouveau use IEEE opcodes, so we should too. If there is a bug caused by not using the clamped RSQ variant, there must be another way to fix it. I don't think the RSQ behavior matters much now that NaNs are disabled. Nine and Wine should implement

Re: [Mesa-dev] [PATCH 03/10] radeonsi: disable NaNs for LS and HS

FWIW I'm still baffled by this shader bit. NaNs are absolutely required to be generated and handled as NaNs in shaders (albeit conversion to ints will make them 0) by DX10 (there's plenty of tests which actually check for this). And generally, you really want to generate NaNs for newer glsl

Re: [Mesa-dev] [Nouveau] [PATCH] nv50, nvc0: don't base decisions on available pushbuf space

On Sat, Oct 10, 2015 at 4:21 PM, Samuel Pitoiset wrote: > > > On 10/10/2015 09:58 PM, Ilia Mirkin wrote: >> >> On Sat, Oct 10, 2015 at 3:55 PM, Samuel Pitoiset >> wrote: >>> >>> >>> On 10/10/2015 09:42 PM, Ilia Mirkin wrote: On Sat,

[Mesa-dev] [PATCH 02/10] gallivm: implement the correct version of LRP

From: Marek Olšák The previous version has precision issues. This can be a problem with tessellation. Sadly, I can't find the article where I read it anymore. I'm not sure if the unsafe-fp-math flag would be enough to revert this. ---

[Mesa-dev] [PATCH 03/10] radeonsi: initialize output, temp, and address registers to "undef"

From: Marek Olšák This removes "v_mov v0, 0" which typically occurs before exports. Totals: SGPRS: 345216 -> 344552 (-0.19 %) VGPRS: 197684 -> 197132 (-0.28 %) Code Size: 7390408 -> 7375376 (-0.20 %) bytes LDS: 91 -> 91 (0.00 %) blocks Scratch: 1842176 -> 1679360 (-8.84 %)

[Mesa-dev] [PATCH 01/10] gallivm: supply correct opcode info to emit functions

From: Marek Olšák This is useful only when emit functions use it. The new radeonsi min/max opcode implementation requires this. --- src/gallium/auxiliary/gallivm/lp_bld_tgsi.c | 5 + 1 file changed, 5 insertions(+) diff --git

[Mesa-dev] [PATCH 06/10] radeonsi: use LRP from gallivm

From: Marek Olšák --- src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c index 23ea23a..c22ea7c 100644 ---

[Mesa-dev] [PATCH 05/10] radeonsi: don't emit AMDGPU intrinsics for integer abs, min, max

From: Marek Olšák No difference according to shader-db. (with the new S_ABS_I32 pattern) --- .../drivers/radeon/radeon_setup_tgsi_llvm.c| 60 ++ 1 file changed, 50 insertions(+), 10 deletions(-) diff --git

[Mesa-dev] [PATCH 04/10] radeonsi: don't emit AMDGPU intrinsics for EX2, ROUND, TRUNC

From: Marek Olšák No difference according to shader-db. --- src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c

Re: [Mesa-dev] [PATCH 08/10] radeonsi: re-enable unsafe-fp-math for LLVM 3.8

FWIW, this isn't quite correct with ARB_shader_precision or GL4.1 -- it specifies that infinities should be correctly generated through division by 0, which unsafe-fp-math doesn't guarantee. At least, that's assuming this is similar to the "fast" per-instruction flag

Re: [Mesa-dev] [PATCH 01/10] gallivm: supply correct opcode info to emit functions

Am 11.10.2015 um 03:29 schrieb Marek Olšák: > From: Marek Olšák > > This is useful only when emit functions use it. > The new radeonsi min/max opcode implementation requires this. > --- > src/gallium/auxiliary/gallivm/lp_bld_tgsi.c | 5 + > 1 file changed, 5

[Mesa-dev] [PATCH 3/3] radeonsi: support thread-safe shaders shared by multiple contexts

From: Marek Olšák The "current" shader pointer is moved from the CSO to the context, so that the CSO is mostly immutable. The only drawback is that the "current" pointer isn't saved when unbinding a shader and it must be looked up when the shader is bound again. This is

[Mesa-dev] [PATCH 2/3] radeonsi: implement vertex color clamping

From: Marek Olšák This is only supported in the compatibility profile (without GS and tess). --- src/gallium/drivers/radeonsi/si_pipe.c | 2 +- src/gallium/drivers/radeonsi/si_shader.c| 42 + src/gallium/drivers/radeonsi/si_shader.h

[Mesa-dev] [PATCH 0/3] RadeonSI forcing st/mesa to create shaders at link time

Hi, This patch series implements all features needed for st/mesa to send shaders to the driver immediately. The good thing about thread-safe shader CSOs is that multithreaded shader compilation suddenly seems easy. Please review. Marek ___ mesa-dev

[Mesa-dev] [PATCH 1/3] radeonsi: implement fragment color clamping

From: Marek Olšák using the shader key for now. --- src/gallium/drivers/radeonsi/si_pipe.c | 2 +- src/gallium/drivers/radeonsi/si_shader.c| 13 + src/gallium/drivers/radeonsi/si_shader.h| 1 + src/gallium/drivers/radeonsi/si_state.c

Re: [Mesa-dev] [PATCH 2/5] i965/vec4: adding vec4_cmod_propagation optimization

On 10/10/15 16:54, Jason Ekstrand wrote: > On Sat, Oct 10, 2015 at 4:24 AM, Alejandro Piñeiro > wrote: >> vec4 port of fs_cmod_propagation. >> >> Shader-db results: >> total instructions in shared programs: 6241226 -> 6224469 (-0.27%) >> instructions in affected programs:

[Mesa-dev] [PATCH shader-db 1/3] Makefile: avoid undefined reference build errors with LIBS

Signed-off-by: Rhys Kidd --- .gitignore | 1 + Makefile | 14 +++--- 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/.gitignore b/.gitignore index f69750a..cffa19c 100644 --- a/.gitignore +++ b/.gitignore @@ -1,2 +1,3 @@ bin run +*.o diff --git

[Mesa-dev] [PATCH shader-db 0/3] Makefile and documentation cleanup

Patchset adds Makefile and documentation improvements. I aimed to write these as I would have found most helpful when seeking to understand shader-db's operation, as a new Mesa developer. First patch resolves the build errors [0] experienced on Ubuntu 15.04 and permit a simple 'make' to work if

[Mesa-dev] [PATCH shader-db 2/3] docs: Improve dependencies documentation

Signed-off-by: Rhys Kidd --- README | 13 - 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/README b/README index e301d0e..6ed3244 100644 --- a/README +++ b/README @@ -47,7 +47,18 @@ ST_DEBUG=precompile R600_DEBUG=ps,vs,gs,precompile ./run shaders

[Mesa-dev] [PATCH shader-db 3/3] docs: Add symbolic link generation step

Signed-off-by: Rhys Kidd --- README | 5 + 1 file changed, 5 insertions(+) diff --git a/README b/README index 6ed3244..03be4e7 100644 --- a/README +++ b/README @@ -60,6 +60,11 @@ Build with: make ``` +run.py relies on a symbolic link to a built piglit bin directory,

Re: [Mesa-dev] [Nouveau] [PATCH] nv50, nvc0: don't base decisions on available pushbuf space

On 10/10/2015 09:58 PM, Ilia Mirkin wrote: On Sat, Oct 10, 2015 at 3:55 PM, Samuel Pitoiset wrote: On 10/10/2015 09:42 PM, Ilia Mirkin wrote: On Sat, Oct 10, 2015 at 3:41 PM, Samuel Pitoiset wrote: This patch looks fine except that it

[Mesa-dev] [PATCH 1/3] gallium: add PIPE_CAP_SHAREABLE_SHADERS

From: Marek Olšák I'll let drivers figure out how to do it. --- src/gallium/docs/source/screen.rst | 2 ++ src/gallium/drivers/freedreno/freedreno_screen.c | 1 + src/gallium/drivers/i915/i915_screen.c | 1 + src/gallium/drivers/ilo/ilo_screen.c

[Mesa-dev] [PATCH 3/3] st/mesa: create shaders which have only one variant immediatelly

From: Marek Olšák --- src/mesa/state_tracker/st_cb_program.c | 5 +++-- src/mesa/state_tracker/st_context.c| 14 ++ src/mesa/state_tracker/st_context.h| 7 +++ 3 files changed, 24 insertions(+), 2 deletions(-) diff --git

[Mesa-dev] [PATCH 2/3] st/mesa: decouple shaders from contexts if they are shareable

From: Marek Olšák --- src/mesa/state_tracker/st_atom_shader.c | 10 +- src/mesa/state_tracker/st_cb_bitmap.c | 2 +- src/mesa/state_tracker/st_cb_drawpixels.c | 2 +- src/mesa/state_tracker/st_context.c | 3 ++- src/mesa/state_tracker/st_context.h

[Mesa-dev] [PATCH 0/3] Creating gallium shaders at link time

Hi, This is a continuation of the previous series. It allows drivers to have only 1 shader variant for every user shader in st/mesa, not counting glDrawPixels and glBitmap variants. In such case, the shader variant is created in LinkShader or ProgramStringNotify. Please review. Marek

Re: [Mesa-dev] [PATCH] nir/glsl: Use shader_prog->Name for naming the NIR shader

On Friday, October 09, 2015 07:45:20 AM Jason Ekstrand wrote: > This has the better name to use. Aparently, sh->Name is usually 0. > --- > src/glsl/nir/glsl_to_nir.cpp | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/src/glsl/nir/glsl_to_nir.cpp

Re: [Mesa-dev] [Nouveau] [PATCH] nv50, nvc0: don't base decisions on available pushbuf space

On 10/10/2015 10:17 PM, Ilia Mirkin wrote: On Sat, Oct 10, 2015 at 4:21 PM, Samuel Pitoiset wrote: On 10/10/2015 09:58 PM, Ilia Mirkin wrote: On Sat, Oct 10, 2015 at 3:55 PM, Samuel Pitoiset wrote: On 10/10/2015 09:42 PM, Ilia Mirkin

Re: [Mesa-dev] [PATCH 08/10] radeonsi: re-enable unsafe-fp-math for LLVM 3.8

Hi Marek, I don't get the hang on Dota 2 Reborn with this patch and LLVM/Mesa git. Tested-by: Nick Sarnie Thanks! On Sat, Oct 10, 2015 at 10:12 PM, Connor Abbott wrote: > FWIW, this isn't quite correct with ARB_shader_precision or GL4.1 -- > it

[Mesa-dev] [PATCH] nv50, nvc0: don't base decisions on available pushbuf space

We still have to push everything out, might as well kick earlier and flip pushbufs when we know we'll need it. This resolves some issues with the new policy of making sure that we always leave a bit of room at the end for fences. Signed-off-by: Ilia Mirkin Cc:

[Mesa-dev] [PATCH v2] configure.ac: ensure RM is set

GNU make predefines RM to rm -f but this is not required by POSIX so ensure that RM is set. This fixes "make clean" on OpenBSD. v2: use AC_CHECK_PROG Signed-off-by: Jonathan Gray CC: "10.6 11.0" --- configure.ac | 2 ++ 1 file changed, 2

[Mesa-dev] [PATCH shader-db] check_dependencies: refactor to a python script

Deliver consistency with all other shader-db scripts, which are Python scripts. No change in features or output strings. Passed pep8, except for two comment lines suggesting commands to add dependencies to the [require] section of *.shader_test files. Although not a performance critical

[Mesa-dev] [PATCH] nouveau: avoid emitting new fences unnecessarily

Right now we emit on every kick, but this is only necessary if something will ever be able to observe that the fence completed. If there are no refs, leave the fence alone and emit it another day. This also happens to work around an issue for the kick handler -- a kick can be a result of e.g.

[Mesa-dev] [PATCH 0/5] Implementation of vec4 equivalent to fs_cmod_propagation optimization

This series implements a vec4 equivalent to fs_cmod_propagation optimization. The last two commits are not really needed for the optimization, are just nice-to-have (imho) that I added while implementing the optimization. Alejandro Piñeiro (5): i965/vec4: nir_emit_if doesn't need to predicate

[Mesa-dev] [PATCH 3/5] i965/vec4: Add unit tests for cmod propagation pass.

This include the same tests coming from test_fs_cmod_propagation, (non vector glsl types included) plus some new with vec4 types, inspired on the regressions found while the optimization was a work in progress. Additionally, the check of number of instructions after the optimization was changed

[Mesa-dev] [PATCH 4/5] i965/vec4: use a custom envvar to decide to print the assembly on test_vec4_cmod_propagation

The complete way to do this would be parse INTEL_DEBUG and print the output if DEBUG_VS (or a new one) is present (see intel_debug.c). But that seems like an overkill for the unit tests, that after all, the most common use case is being run when calling make check. --- Just added the envvar

[Mesa-dev] [PATCH 2/5] i965/vec4: adding vec4_cmod_propagation optimization

vec4 port of fs_cmod_propagation. Shader-db results: total instructions in shared programs: 6241226 -> 6224469 (-0.27%) instructions in affected programs: 498213 -> 481456 (-3.36%) helped:3082 HURT: 0 --- The final outcome is

[Mesa-dev] [PATCH 5/5] i965/vec4: print predicate control at brw_vec4 dump_instruction

--- I found this useful while I was using INTEL_DEBUG=optimizer after changing how the ifs are emitted. And after all, that info is also included by brw_disasm.c I assumed that at the vec4_visitor we would not need to handle pred_ctrl_align1, but Im not totally sure.

[Mesa-dev] [PATCH 1/5] i965/vec4: nir_emit_if doesn't need to predicate based on all the channels

--- I already talked about this with Jason Ekstrand and Matt Turner privately, but just in case somebody else jump to the review: When using BRW_PREDICATE_NORMAL, the if will use all the channels of the register flag. But nir_if only reads from one channel, so that is not needed. Another hint

[Mesa-dev] [Bug 91643] mesa-demos-8.2.0 (latest released version) fails to build against mesa-10.6.4-2.mga6.tainted.src.rpm

https://bugs.freedesktop.org/show_bug.cgi?id=91643 Dennis Schridde changed: What|Removed |Added CC||devuran...@gmx.net

Re: [Mesa-dev] New stable-branch 11.0 candidate pushed

On Thu, Oct 8, 2015 at 11:50 AM, Emil Velikov wrote: > Hello list, > > The candidate for the Mesa 11.0.3 is now available. Currently we have: > - 46 queued > - 18 nominated (outstanding) > - and 7 rejected/obsolete patches > > This time around we have a bunch of EGL