chip-ecc.calculate() is used for calculating and fetching of ECC syndrome by
processing the data passed during Read/Write accesses.
All H/W based ECC schemes use GPMC controller to calculate ECC syndrome.
But each BCHx_ECC scheme has its own implemetation of post-processing and
fetching ECC
BCH8_ECC scheme implemented in omap_gpmc.c driver has following two favours
+---+-+-+
|ECC Scheme | ECC Calculation | Error Detection |
+---+-+-+
chip-ecc.hwctl() is used for preparing the H/W controller before read/write
NAND accesses (like assigning data-buf, enabling ECC scheme configs, etc.)
Though all ECC schemes in OMAP NAND driver use GPMC controller for generating
ECC syndrome (for both Read/Write accesses). But but in current code
[changes in v2]
- added documentation for CONFIG_NAND_OMAP_xx in doc/README.nand
- added CONFIG_BCH along with CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
to include software library lib/bch.c
- fixed board_nand_init() and omap_enable_hwecc()
[Original v1]
This patch series updates BCH8_ECC
chip-ecc.correct() is used for detecting and correcting bit-flips during read
operations. In omap-nand driver it implemented as:
(a) omap_correct_data(): for h/w based ECC_HAM1 scheme
(b) omap_correct_data_bch() + CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
for ECC_BCH8 scheme using
On Monday 12 August 2013 11:06 PM, Mugunthan V N wrote:
On Monday 12 August 2013 07:52 PM, Tom Rini wrote:
+#define GMII2_SEL_MII0x0
+#define GMII2_SEL_RMII0x4
+#define GMII2_SEL_RGMII 0x8
+#define GMII2_SEL_NOTUSED 0xc
NOTUSED not needed as it
From: Zhang Ying rock.ap.freescale.net
SPL defines CONFIG_SPL_BUILD but this does not percolate to the autoconf.mk
Makefile.
As a result the build breaks when CONFIG_SPL_BUILD is used in the
board-specific include
header file. With this, there is a possibility of having a CONFIG option
defined
The driver makes it possible to use an application UART as
the U-Boot output console for Freescale i.MX23/i.MX28 devices.
Signed-off-by: Andreas Wass andreas.w...@dalelven.com
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Marek Vasut ma...@denx.de
---
Changes for v2:
- Added comment that
Hi, experts:
I found U-Boot Driver Model introduction ppt at SLM2012 Conference.
It seems current drivers in u-boot was still not implemented by this
Driver Model?
It was just a long-term plan?
Best wishes,
___
U-Boot mailing list
The driver makes it possible to use an application UART as
the U-Boot output console for Freescale i.MX23/i.MX28 devices.
Signed-off-by: Andreas Wass andreas.w...@dalelven.com
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Marek Vasut ma...@denx.de
---
Changes for v2:
- Added comment that
If dout buffer is not 32 bit-aligned or data to transmit is not multiple
of 32 bit the read data pointer is already incremented on single byte reads.
Signed-off-by: Timo Herbrecher t.herbrec...@gateware.de
---
drivers/spi/mxc_spi.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
NanoBone Specification:
---
CPU:
TI AM335x
Memory:
256MB DDR3
64MB NOR flash
256MB NAND flash
128KB FRAM
Ethernet:
2 x 10/100 connected to SMSC LAN8710 PHY
USB:
1 x USB2.0 Type A
I2C:
2Kbit EEPROM (Microchip 24AA02)
RTC (Maxim DS1338)
GPIO Expander
From: David Feng feng...@phytium.com.cn
This patch provide u-boot with arm64 support. Currently, it works on
Foundation Model for armv8 or Fast Model for armv8.
Signed-off-by: David Feng feng...@phytium.com.cn
---
Changes for v2:
- fix EXPORT_FUNC macro to use register x9 according to Scott
From: David Feng feng...@phytium.com.cn
This patch provide u-boot with arm64 support. Currently, it works on
Foundation Model for armv8 or Fast Model for armv8.
Signed-off-by: David Feng feng...@phytium.com.cn
---
Changes for v2:
- fix EXPORT_FUNC macro to use register x9 according to Scott
From: David Feng feng...@phytium.com.cn
This patch provide u-boot with arm64 support. Currently, it works on
Foundation Model for armv8 or Fast Model for armv8.
Signed-off-by: David Feng feng...@phytium.com.cn
---
Changes for v2:
- fix EXPORT_FUNC macro to use register x9 according to Scott
From: David Feng feng...@phytium.com.cn
*** BLURB HERE ***
David Feng (4):
core support of arm64
board support of arm64
arch/lib support of arm64
arch/cpu and arch/include and arch/dts support of arm64
arch/arm64/config.mk| 32 +++
arch/arm64/cpu/armv8/Makefile
Hi,
On Wed, Aug 14, 2013 at 2:05 AM, tiger...@viatech.com.cn wrote:
Hi, experts:
I found U-Boot Driver Model introduction ppt at SLM2012 Conference.
It seems current drivers in u-boot was still not implemented by this
Driver Model?
Version 3 was posted here:
Hi David,
On Wed, Aug 14, 2013 at 4:58 AM, feng...@phytium.com.cn wrote:
From: David Feng feng...@phytium.com.cn
*** BLURB HERE ***
David Feng (4):
core support of arm64
board support of arm64
arch/lib support of arm64
arch/cpu and arch/include and arch/dts support of arm64
Hi Mårten,
On 13/08/2013 17:48, Mårten Wikman wrote:
2013/8/11 Otavio Salvador ota...@ossystems.com.br:
On Sun, Aug 11, 2013 at 10:49 AM, Mårten Wikman marten.wik...@novia.fi
wrote:
This adds necessary information on how to use U-boot on SPI NOR on MX28evk
Signed-off-by: Marten Wikman
2013.08.11. 21:39 keltezéssel, Daniel Schwierzeck írta:
Signed-off-by: Daniel Schwierzeck daniel.schwierz...@gmail.com
Looks good, but the subject line is misleading a bit. I would expect that the
patch fixes all warnings, however there are some CamelCase warnings even after
the patch.
-Gabor
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 08/13/2013 10:31 PM, Zhang Ying-B40530 wrote:
Hi, Tom, This patch hasn't been applied? I think it should be
applied early and it is needed by other patches of this set.
Thanks.
I expect that as part of the overall series, once ready, York
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 08/14/2013 02:29 AM, Mugunthan V N wrote:
On Monday 12 August 2013 11:06 PM, Mugunthan V N wrote:
On Monday 12 August 2013 07:52 PM, Tom Rini wrote:
+#define GMII2_SEL_MII 0x0
+#define GMII2_SEL_RMII 0x4 +#define
Enable 8-bit host capability for HSMMC2 and/or HSMMC3. CONFIG_HSMMC2_8BIT
(for OMAP4/5/DRA7xx) and/or CONFIG_HSMMC3_8BIT (for DRA7xx only) must be
defined in the board header if an 8-bit eMMC device is connected to the
corresponding port.
Fix the No status update error that appeared for eMMC
Add a am33xx_spl_board_init (and enable the PMICs) that we may see,
depending on the board we are running on. In all cases, we see if we
can rely on the efuse_sma register to tell us the maximum speed. In the
case of Beaglebone White, we need to make sure we are on AC power, and
are on later
Starting with PG2.1 we have a register in the CONTROL_MODULE that is set
with the package type and maximum supported frequency. Add this, and
the relevant mask/values.
Signed-off-by: Tom Rini tr...@ti.com
---
arch/arm/include/asm/arch-am33xx/cpu.h | 12
1 file changed, 12
From: Philip, Avinash avinashphi...@ti.com
Add a driver for the TPS65910 PMIC that is found in the AM335x GP EVM,
AM335x EVM SK and others.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
[trini: Split and rework Avinash's changes into new drivers/power
framework]
Signed-off-by: Tom Rini
We may need to access the PMIC code in SPL, when we have power set.
Signed-off-by: Tom Rini tr...@ti.com
---
spl/Makefile |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/spl/Makefile b/spl/Makefile
index 6e5299b..dff1345 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@
From: Greg Guyotte gguyo...@ti.com
Add a driver for the TPS65217 PMIC that is found in the Beaglebone
family of boards.
Signed-off-by: Greg Guyotte gguyo...@ti.com
[trini: Split and rework Greg's changes into new drivers/power
framework]
Signed-off-by: Tom Rini tr...@ti.com
---
Changes in v2:
-
We need to allow for a further call-out in spl_board_init. Call this
am33xx_spl_board_init and add a __weak version. This function may be
used to scale the MPU frequency up, depending on board needs.
Signed-off-by: Tom Rini tr...@ti.com
---
Changes in v2:
- Move am33xx_spl_board_init to
From: Steve Kipisz s-kipi...@ti.com
In Errata 1.0.24, if the board is running at OPP50 and has a warm reset,
the boot ROM sets the frequencies for OPP100. This patch attempts to
drop the frequencies back to OPP50 as soon as possible in the SPL. Then
later the voltages and frequencies up set
Add a am33xx_spl_board_init (and enable the PMICs) that we may see,
depending on the board we are running on. In all cases, we see if we
can rely on the efuse_sma register to tell us the maximum speed. In the
case of Beaglebone White, we need to make sure we are on AC power, and
are on later
Hi Tom, Greg
From: Greg Guyotte gguyo...@ti.com
Add a driver for the TPS65217 PMIC that is found in the Beaglebone
family of boards.
Signed-off-by: Greg Guyotte gguyo...@ti.com
[trini: Split and rework Greg's changes into new drivers/power
framework]
Signed-off-by: Tom Rini
Hi Tom, Philip,
I have the same comments as with:
[PATCH v2 2/6] drivers/power/pmic: Add tps65217 driver
From: Philip, Avinash avinashphi...@ti.com
Add a driver for the TPS65910 PMIC that is found in the AM335x GP EVM,
AM335x EVM SK and others.
Signed-off-by: Philip, Avinash
On 08/14/2013 06:48 AM, Tom Rini wrote:
On 08/13/2013 10:31 PM, Zhang Ying-B40530 wrote:
Hi, Tom, This patch hasn't been applied? I think it should be
applied early and it is needed by other patches of this set.
Thanks.
I expect that as part of the overall series, once ready, York will
On Wed, Aug 14, 2013 at 05:08:12PM +0200, Lukasz Majewski wrote:
Hi Tom, Greg
From: Greg Guyotte gguyo...@ti.com
Add a driver for the TPS65217 PMIC that is found in the Beaglebone
family of boards.
Signed-off-by: Greg Guyotte gguyo...@ti.com
[trini: Split and rework Greg's
On 08/13/2013 03:12 PM, Tom Rini wrote:
On Wed, Aug 07, 2013 at 10:20:01AM -0600, Stephen Warren wrote:
On 08/06/2013 11:52 PM, Simon Glass wrote:
Tegra recently moved to the new I2C framework, which sets up
I2C prior to relocation, and prior to calling i2c_init_board().
This causes a crash
Enable 8-bit host capability for HSMMC2 and/or HSMMC3. CONFIG_HSMMC2_8BIT
(for OMAP4/5/DRA7xx) and/or CONFIG_HSMMC3_8BIT (for DRA7xx only) must be
defined in the board header if an 8-bit eMMC device is connected to the
corresponding port.
Fix the No status update error that appeared for eMMC
Hi Stephen,
On Wed, Aug 14, 2013 at 9:59 AM, Stephen Warren swar...@wwwdotorg.org wrote:
On 08/13/2013 03:12 PM, Tom Rini wrote:
On Wed, Aug 07, 2013 at 10:20:01AM -0600, Stephen Warren wrote:
On 08/06/2013 11:52 PM, Simon Glass wrote:
Tegra recently moved to the new I2C framework, which sets
On 07/18/2013 01:13 PM, Thierry Reding wrote:
From: Thierry Reding tred...@nvidia.com
Currently all Tegra SoCs are assumed to have 32 byte cache lines. This
isn't true for Tegra114, however, which uses 4 Cortex-A15 cores and
therefore uses a cache line size of 64 bytes. Move the cache line
From: Stephen Warren swar...@nvidia.com
This way, we don't have to run mkimage on them.
Signed-off-by: Stephen Warren swar...@nvidia.com
---
include/configs/tegra-common.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h
index
On Wed, Aug 14, 2013 at 10:05 AM, Stephen Warren swar...@wwwdotorg.org wrote:
From: Stephen Warren swar...@nvidia.com
This way, we don't have to run mkimage on them.
Signed-off-by: Stephen Warren swar...@nvidia.com
Acked-by: Simon Glass s...@chromium.org
Sure, your mkimage patch, and Thierry's 2 cache patches have been applied to
u-boot-tegra/next (after rebasing next against Albert's ARM master), build
tested (all Tegra boards build fine), and pushed to denx. Also updated
u-boot-tegra/master w/Albert's ARM TOT.
Sorry for the delay, really
Hi Kees,
On Mon, Aug 12, 2013 at 5:01 PM, Kees Cook keesc...@chromium.org wrote:
[sending, now subscribed so mailman won't yell at me]
This series fixes gzip, lzma, and lzo to not overflow when writing
to output buffers. Without this, it might be possible for untrusted
compressed input to
Hi Kees,
On Mon, Aug 12, 2013 at 4:48 PM, Kees Cook keesc...@chromium.org wrote:
This adds the test_compression command when building the sandbox. This
tests the existing compression and decompression routines for simple
sanity and for buffer overflow conditions.
Signed-off-by: Kees Cook
Hi Kees,
On Mon, Aug 12, 2013 at 5:02 PM, Kees Cook keesc...@chromium.org wrote:
This adds the missing compression config items to the README.
Signed-off-by: Kees Cook keesc...@chromium.org
---
README |9 +
1 file changed, 9 insertions(+)
diff --git a/README b/README
index
On Mon, Aug 12, 2013 at 5:02 PM, Kees Cook keesc...@chromium.org wrote:
The output buffer size not be reset by the gzip decoder or there is a
risk of overflowing memory during decompression.
Signed-off-by: Kees Cook keesc...@chromium.org
Looks right to me.
Acked-by: Simon Glass
On Mon, Aug 12, 2013 at 5:02 PM, Kees Cook keesc...@chromium.org wrote:
The output buffer size must be correctly passed to the lzma decoder or
there is a risk of overflowing memory during decompression. Switching
to the LZMA_FINISH_END mode means nothing is left in an unknown state
once the
On Mon, Aug 12, 2013 at 5:02 PM, Kees Cook keesc...@chromium.org wrote:
This checks the size of the output buffer and fails if it was going to
overflow the buffer during lzo decompression.
Signed-off-by: Kees Cook keesc...@chromium.org
Acked-by: Simon Glass s...@chromium.org
Hi Kees,
On Mon, Aug 12, 2013 at 5:02 PM, Kees Cook keesc...@chromium.org wrote:
This passes the actual memory allocation size for the destination to the
decompression routines, avoiding potential memory overflows.
Signed-off-by: Kees Cook keesc...@chromium.org
Acked-by: Simon Glass
On 08/05/2013 03:30 AM, Ramneek Mehresh wrote:
snip
diff --git a/include/fsl_usb.h b/include/fsl_usb.h
new file mode 100644
index 000..88d6a1f
--- /dev/null
+++ b/include/fsl_usb.h
@@ -0,0 +1,80 @@
+/*
+ * Freescale USB Controller
+ *
+ * Copyright 2013 Freescale Semiconductor,
On May 6, 2013, at 8:59 AM, Luka Perkov l...@openwrt.org wrote:
On Mon, May 06, 2013 at 02:32:51PM +0200, Wolfgang Denk wrote:
It appears there is no really good reason for this patch, so I think
we should drop it.
Ok. Thanks for the review.
Would there be any objection to adding an option
Currently all ARM targets spell out that r8 needs to be a reserved
register, while using a common crt0.s. Move this to a common make
variable so it is not repeated (and can be easily changed)
cc: Albert ARIBAUD albert.u.b...@aribaud.net
Signed-off-by: Jeroen Hofstee jer...@myspectrum.nl
---
v2: update the README as requested by Wolfgang Denk
cc: w...@denx.de
Jeroen Hofstee (4):
ARM: make reserving the gd register a make variable
ARM,relocate: do not use r9
ARM: use r9 for gd
README: update ARM register usage
README | 8 +---
Besides the change of this patchset it also updates the
README to reflect that GOT-generated relocations are no
longer supported on ARM.
cc: Albert ARIBAUD albert.u.b...@aribaud.net
Signed-off-by: Jeroen Hofstee jer...@myspectrum.nl
---
README | 8 +---
1 file changed, 5 insertions(+), 3
r9 is a platform-specific register in ARM EABI and not per
definition a general purpose register. Do not use it while
relocating so it can be used for gd.
cc: Albert ARIBAUD albert.u.b...@aribaud.net
Signed-off-by: Jeroen Hofstee jer...@myspectrum.nl
---
arch/arm/lib/relocate.S | 6 +++---
1
To be more EABI compliant and as a preparation for building
with clang, use the platform-specific r9 register for gd
instead of r8.
note: The FIQ is not updated since it is not used in u-boot,
and under discussion for the time being.
The following checkpatch warning is ignored:
WARNING: Use of
Replace license header with SPDX license identifier.
Replace GPL-2.0 with GPL-2.0+.
Signed-off-by: York Sun york...@freescale.com
---
include/fsl_usb.h | 18 +-
1 file changed, 1 insertion(+), 17 deletions(-)
diff --git a/include/fsl_usb.h b/include/fsl_usb.h
index
Hi,
On Wed, Aug 14, 2013 at 10:58 AM, Harvey Chapman hchap...@3gfp.com wrote:
On May 6, 2013, at 8:59 AM, Luka Perkov l...@openwrt.org wrote:
On Mon, May 06, 2013 at 02:32:51PM +0200, Wolfgang Denk wrote:
It appears there is no really good reason for this patch, so I think
we should drop it.
On Wed, 2013-08-14 at 12:43 +0800, FengHua wrote:
-原始邮件-
发件人: Scott Wood scottw...@freescale.com
发送时间: 2013年8月14日 星期三
收件人: feng...@phytium.com.cn
抄送: u-boot@lists.denx.de, tr...@ti.com
主题: Re: [U-Boot] [PATCH] part1 of arm64. This patch provide u-boot with
arm64 support.
Acked.
-Ramneek
-Original Message-
From: sun york-R58495
Sent: Wednesday, August 14, 2013 11:56 PM
To: Mehresh Ramneek-B31383
Cc: u-boot@lists.denx.de; sun york-R58495
Subject: [PATCH] include/fsl_usb.h: Cleanup license header
Replace license header with SPDX license identifier.
Tom,
The following changes since commit b98d934128bcd98106e764d2f492ac79c38ae53d:
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx (2013-08-13
09:14:02 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-mpc85xx.git master
for you to fetch changes up to
Dear Andreas Wass,
The driver makes it possible to use an application UART as
the U-Boot output console for Freescale i.MX23/i.MX28 devices.
Signed-off-by: Andreas Wass andreas.w...@dalelven.com
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Marek Vasut ma...@denx.de
---
Changes for
Hi Andreas,
On Wed, Aug 14, 2013 at 4:20 PM, Marek Vasut ma...@denx.de wrote:
The rest is good.
You could remove the RFC tag in your next submission.
Also, it would be nice to add a mx28evk target that could make use of
this driver, otherwise this will be just dead code, as there is no
board
Dear Fabio Estevam,
Hi Andreas,
On Wed, Aug 14, 2013 at 4:20 PM, Marek Vasut ma...@denx.de wrote:
The rest is good.
You could remove the RFC tag in your next submission.
Yes
Also, it would be nice to add a mx28evk target that could make use of
this driver, otherwise this will be just
Hi York,
I guess with Andy no longer there as FSL u-boot maintainer, will the patch below
go through you or Joe. If no one has an objection to this patch, can I get a
Acked-by and
can we queue it up for upstream.
Regards,
Bhupesh
-Original Message-
From: Sharma Bhupesh-B45370
Sent:
On Wed, 14 Aug 2013 11:57:06 -0400 Tom Rini tr...@ti.com wrote:
On Wed, Aug 14, 2013 at 05:08:12PM +0200, Lukasz Majewski wrote:
Hi Tom, Greg
From: Greg Guyotte gguyo...@ti.com
Add a driver for the TPS65217 PMIC that is found in the Beaglebone
family of boards.
On 08/14/2013 01:30 PM, Sharma Bhupesh-B45370 wrote:
Hi York,
I guess with Andy no longer there as FSL u-boot maintainer, will the patch
below
go through you or Joe. If no one has an objection to this patch, can I get a
Acked-by and
can we queue it up for upstream.
Acked-by: York Sun
-Original Message-
From: sun york-R58495
Sent: Thursday, August 15, 2013 2:29 AM
To: Sharma Bhupesh-B45370
Cc: 'u-boot@lists.denx.de'; 'joe.hershber...@gmail.com'
Subject: Re: [PATCH 1/1] net: phy/realtek: Add support for RTL8211DN and
RTL8211E phy modules
On 08/14/2013 01:30
The driver makes it possible to use an application UART as
the U-Boot output console for Freescale i.MX23/i.MX28 devices.
Signed-off-by: Andreas Wass andreas.w...@dalelven.com
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Marek Vasut ma...@denx.de
---
Changes for v2:
- Added comment that
Dear Andreas Wass,
The driver makes it possible to use an application UART as
the U-Boot output console for Freescale i.MX23/i.MX28 devices.
Signed-off-by: Andreas Wass andreas.w...@dalelven.com
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Marek Vasut ma...@denx.de
---
Changes for
On Wed, Aug 14, 2013 at 4:08 PM, Sharma Bhupesh-B45370
b45...@freescale.com wrote:
-Original Message-
From: sun york-R58495
Sent: Thursday, August 15, 2013 2:29 AM
To: Sharma Bhupesh-B45370
Cc: 'u-boot@lists.denx.de'; 'joe.hershber...@gmail.com'
Subject: Re: [PATCH 1/1] net:
York,
I had checked all the patch and I am sure there is only this patch
almost forgotten.
I don't know how to do. Need I send the patch again or other way?
Thanks.
-Original Message-
From: sun york-R58495
Sent: Wednesday, August 14, 2013 11:42 PM
To:
CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK was needed only on
obsolete P1010RDB Rev.B non-formal board, not reproduced on
P1010RDB Rev.C and new P1010RDB-PB, now it's no longer needed.
Signed-off-by: Shengzhou Liu shengzhou@freescale.com
---
arch/powerpc/include/asm/config_mpc85xx.h | 1 -
1
Multiple read/write transactions initiated by security
engine may cause system to hang.
Workaround: set MCFGR[AXIPIPE] to 0 to avoid hang.
Signed-off-by: Shengzhou Liu shengzhou@freescale.com
---
arch/powerpc/cpu/mpc85xx/cmd_errata.c | 4
arch/powerpc/cpu/mpc85xx/cpu_init.c |
On Aug 14, 2013, at 7:25 PM, Zhang Ying-B40530 wrote:
York,
I had checked all the patch and I am sure there is only this patch
almost forgotten.
I don't know how to do. Need I send the patch again or other way?
Thanks.
No need to resend. I can mark it. Just want to be
Hi, York,
I see. I am sure there isn't newer version.
-Original Message-
From: sun york-R58495
Sent: Thursday, August 15, 2013 10:42 AM
To: Zhang Ying-B40530
Cc: Tom Rini; Wood Scott-B07421; u-boot@lists.denx.de; Andy Fleming; Xie
Xiaobo-R63061
Subject: Re: [U-Boot] [PATCH 06/10
On 07/09/2013 02:43 AM, Naumann Andreas wrote:
In chapter 'Advisory 2.1 USB Host Clock Drift Causes USB Spec Non-compliance in
Certain Configurations' of the TI Errata it is recommended to use certain
div/mult values for the DPLL5 clock setup.
So far u-boot used the old 34xx values, so I added
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