From: Jean-Christian de Rivaz <[EMAIL PROTECTED]>
Support for the ADV7183B video decoder chip on the BF561-EZKIT board.
Warning: some old BF561-EZKIT board have a ADV7183A chip that is not
supported by this code.
The Blackfin V4L driver use internally the bfin_*_PPI_* macros that
was not available on the BF561 because it have two PPI with macros
bfin_*_PPI0_* and bfin_*_PPI1_*. I solved this by adding bfin_*_PPI_*
macros that are exactly the same as bfin_*_PPI0_* marco.
Signed-off-by: Taha Iali <[EMAIL PROTECTED]>
Signed-off-by: Jean-Christian de Rivaz <[EMAIL PROTECTED]>
---
drivers/media/video/blackfin/Kconfig | 8 +-
drivers/media/video/blackfin/Makefile | 1 +
drivers/media/video/blackfin/adv7183b.c | 225
+++++++++++++++++++++++++++
drivers/media/video/blackfin/adv7183b.h | 85 ++++++++++
drivers/media/video/blackfin/blackfin_cam.c | 3 +
include/asm-blackfin/mach-bf561/cdefBF561.h | 12 ++
6 files changed, 333 insertions(+), 1 deletions(-)
diff --git a/drivers/media/video/blackfin/Kconfig
b/drivers/media/video/blackfin/Kconfig
index 54d6b84..6ef288b 100644
--- a/drivers/media/video/blackfin/Kconfig
+++ b/drivers/media/video/blackfin/Kconfig
@@ -5,7 +5,7 @@ config VIDEO_BLACKFIN_CAM
default n
help
V4L Support for ST VS6524, VS6624 sensor Micron MT9M001, MT9V022
- attached to the Blackfin PPI.
+ sensor AD ADV7183B attached to the Blackfin PPI.
To compile this driver as a module, choose M here: the
module will be called blackfin_cam.
@@ -47,5 +47,11 @@ config OV9655
Omnivision OV9655 Sensor Support
This is work in progress. NOT YET COMPLETE.
+config ADV7183B
+ bool "ADV7183B"
+ depends on VIDEO_BLACKFIN_CAM
+ help
+ Analog Devices ADV7183B Sensor Support
+
endchoice
diff --git a/drivers/media/video/blackfin/Makefile
b/drivers/media/video/blackfin/Makefile
index 73f03a4..a0cc3d6 100644
--- a/drivers/media/video/blackfin/Makefile
+++ b/drivers/media/video/blackfin/Makefile
@@ -3,5 +3,6 @@ bfin-cam-sensor-$(CONFIG_VS6524) := vs6524.o
bfin-cam-sensor-$(CONFIG_VS6624) := vs6624.o
bfin-cam-sensor-$(CONFIG_MT9V022) := mt9v022.o
bfin-cam-sensor-$(CONFIG_OV9655) := ov9655.o
+bfin-cam-sensor-$(CONFIG_ADV7183B):= adv7183b.o
obj-$(CONFIG_VIDEO_BLACKFIN_CAM) := blackfin_cam.o $(bfin-cam-sensor-y)
obj-$(CONFIG_VIDEO_BLACKFIN_MT9M001) += mt9m001.o
diff --git a/drivers/media/video/blackfin/adv7183b.c
b/drivers/media/video/blackfin/adv7183b.c
new file mode 100644
index 0000000..b9d10c3
--- /dev/null
+++ b/drivers/media/video/blackfin/adv7183b.c
@@ -0,0 +1,225 @@
+/*
+ * File: drivers/media/video/blackfin/adv7183b.c
+ * Based on: drivers/media/video/blackfin/mt9v022.c
+ * Author: Taha Iali
+ *
+ * Created: may 2008
+ * Description: Command driver for Analog Devices ADV7183B sensor
+ *
+ *
+ * Modified:
+ * Copyright 2008 Taha Iali
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/fs.h>
+#include <linux/i2c.h>
+#include <linux/i2c-dev.h>
+#include <linux/init.h>
+#include <linux/jiffies.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/poll.h>
+#include <linux/proc_fs.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/time.h>
+#include <linux/timex.h>
+#include <linux/wait.h>
+#include <media/v4l2-dev.h>
+#include <asm/gpio.h>
+
+#include "adv7183b.h"
+
+static DEFINE_MUTEX(adv7183b_sysfs_lock);
+
+static int adv7183b_write_byte(struct i2c_client *client, unsigned char
offset, unsigned char data)
+{
+ u8 buf[2];
+
+ BUG_ON(client == NULL);
+
+ buf[0] = offset;
+ buf[1] = data;
+ i2c_master_send(client, buf, sizeof(buf));
+
+ return 0;
+}
+
+static int adv7183b_probe(struct i2c_client *client)
+{
+ return 0;
+}
+
+static int adv7183b_set_pixfmt(struct i2c_client *client, u32 arg)
+{
+ return 0;
+}
+
+static int adv7183b_set_gpio(unsigned gpio, int value)
+{
+ if (gpio_request (gpio, DRV_NAME)) {
+ printk(KERN_ERR "bcap_open: Failed to request GPIO %d\n", gpio);
+ return -EBUSY;
+ }
+ gpio_direction_output(gpio, 0);
+ gpio_set_value(gpio, value);
+
+ return 0;
+}
+
+static int adv7183b_init(struct i2c_client *client, u32 arg)
+{
+
+ printk(KERN_INFO "driver for ADV7183B init\n");
+ if (adv7183b_probe(client)) {
+ return -ENODEV;
+ }
+
+ // Configuration Example, taken from datasheet ADV7183B
+
+#ifdef ADV7183B_28MHZ
+ /* EXAMPLES IN THIS SECTION USE A 28 MHz CLOCK.
+ * Mode 1 CVBS Input (Composite Video on AIN5)
+ * All standards are supported through autodetect, 8-bit, 4:2:2, ITU-R
BT.656 output on P15 to P8.
+ */
+ adv7183b_write_byte(client, 0x00, 0x04); // CVBS input on AIN5.
+ adv7183b_write_byte(client, 0x15, 0x00); // Slow down digital clamps.
+ adv7183b_write_byte(client, 0x17, 0x41); // Set CSFM to SH1.
+ adv7183b_write_byte(client, 0x1D, 0x40); // Enable 28 MHz crystal.
+ adv7183b_write_byte(client, 0x0F, 0x40); // TRAQ.
+ adv7183b_write_byte(client, 0x3A, 0x16); // Power down ADC 1 and ADC 2.
+ adv7183b_write_byte(client, 0x3D, 0xC3); // MWE enable manual window.
+ adv7183b_write_byte(client, 0x3F, 0xE4); // BGB to 36.
+ adv7183b_write_byte(client, 0x50, 0x04); // Set DNR threshold to 4 for
flat response.
+ adv7183b_write_byte(client, 0x0E, 0x80); // ADI recommended
programming sequence.
+ // This sequence must be followed exactly when setting up the decoder.
+ adv7183b_write_byte(client, 0x50, 0x20); // Recommended setting.
+ adv7183b_write_byte(client, 0x52, 0x18); // Recommended setting.
+ adv7183b_write_byte(client, 0x58, 0xED); // Recommended setting.
+ adv7183b_write_byte(client, 0x77, 0xC5); // Recommended setting.
+ adv7183b_write_byte(client, 0x7C, 0x93); // Recommended setting.
+ adv7183b_write_byte(client, 0x7D, 0x00); // Recommended setting.
+ adv7183b_write_byte(client, 0x90, 0xC9); // Recommended setting.
+ adv7183b_write_byte(client, 0x91, 0x40); // Recommended setting.
+ adv7183b_write_byte(client, 0x92, 0x3C); // Recommended setting.
+ adv7183b_write_byte(client, 0x93, 0xCA); // Recommended setting.
+ adv7183b_write_byte(client, 0x94, 0xdD); // Recommended setting.
+ adv7183b_write_byte(client, 0xCF, 0x50); // Recommended setting.
+ adv7183b_write_byte(client, 0xD0, 0x4E); // Recommended setting.
+ adv7183b_write_byte(client, 0xD6, 0xDD); // Recommended setting.
+ adv7183b_write_byte(client, 0xE5, 0x51); // Recommended setting.
+ adv7183b_write_byte(client, 0xD5, 0xA0); // Recommended setting.
+ adv7183b_write_byte(client, 0xD7, 0xEA); // Recommended setting.
+ adv7183b_write_byte(client, 0xE4, 0x3E); // Recommended setting.
+ adv7183b_write_byte(client, 0xE9, 0x3E); // Recommended setting.
+ adv7183b_write_byte(client, 0xEA, 0x0F); // Recommended setting.
+ adv7183b_write_byte(client, 0x0E, 0x00); // Recommended setting.
+#else
+ /* EXAMPLES USING 27 MHz CLOCK
+ * Mode 1 CVBS Input (Composite Video on AIN5)
+ * All standards are supported through autodetect, 8-bit, 4:2:2, ITU-R
BT.656 output on P15 to P8.
+ */
+ adv7183b_write_byte(client, 0x00, 0x04); // CVBS input on AIN5.
+ adv7183b_write_byte(client, 0x15, 0x00); // Slow down digital clamps.
+ adv7183b_write_byte(client, 0x17, 0x41); // Set CSFM to SH1.
+ adv7183b_write_byte(client, 0x3A, 0x16); // Power down ADC 1 and ADC 2.
+ adv7183b_write_byte(client, 0x50, 0x04); // Set DNR threshold to 4 for
flat response.
+ adv7183b_write_byte(client, 0x0E, 0x80); // ADI recommended
programming sequence.
+ // This sequence must be followed exactly when setting up the decoder.
+ adv7183b_write_byte(client, 0x50, 0x20); // Recommended setting.
+ adv7183b_write_byte(client, 0x52, 0x18); // Recommended setting.
+ adv7183b_write_byte(client, 0x58, 0xED); // Recommended setting.
+ adv7183b_write_byte(client, 0x77, 0xC5); // Recommended setting.
+ adv7183b_write_byte(client, 0x7C, 0x93); // Recommended setting.
+ adv7183b_write_byte(client, 0x7D, 0x00); // Recommended setting.
+ adv7183b_write_byte(client, 0xD0, 0x48); // Recommended setting.
+ adv7183b_write_byte(client, 0xD5, 0xA0); // Recommended setting.
+ adv7183b_write_byte(client, 0xD7, 0xEA); // Recommended setting.
+ adv7183b_write_byte(client, 0xE4, 0x3E); // Recommended setting.
+ adv7183b_write_byte(client, 0xE9, 0x3E); // Recommended setting
+ adv7183b_write_byte(client, 0xEA, 0x0F); // Recommended setting.
+ adv7183b_write_byte(client, 0x0E, 0x00); // Recommended setting.
+#endif
+
+#ifdef ADV7183B_STRONG
+ adv7183b_write_byte(client, 0xF4, 0x3F);
+#endif
+
+#ifdef ADV7183B_GPIO_OE
+ adv7183b_set_gpio(ADV7183B_GPIO_OE, 0);
+#endif
+
+ return 0;
+
+}
+
+static int adv7183b_exit(struct i2c_client *client, u32 arg)
+{
+ return 0;
+}
+
+int adv7183b_cam_control(struct i2c_client *client, u32 cmd, u32 arg)
+{
+ switch (cmd) {
+ case CAM_CMD_INIT:
+ return adv7183b_init(client, arg);
+ case CAM_CMD_SET_PIXFMT:
+ return adv7183b_set_pixfmt(client, arg);
+ case CAM_CMD_EXIT:
+ return adv7183b_exit(client, arg);
+ default:
+ return -ENOIOCTLCMD;
+ }
+ return 0;
+}
+
+static int adv7183b_create_sysfs(struct video_device *v4ldev)
+{
+ return 0;
+}
+
+static int adv7183b_power(u32 arg)
+{
+#ifdef ADV7183B_GPIO_RESET
+ adv7183b_set_gpio(ADV7183B_GPIO_RESET, arg);
+#endif
+
+ return 0;
+}
+
+static struct bcap_camera_ops adv7183b_ops = {
+ .cam_control = adv7183b_cam_control,
+ .create_sysfs = adv7183b_create_sysfs,
+ .power = adv7183b_power,
+};
+
+struct bcap_camera_ops *get_camops(void)
+{
+ printk(KERN_INFO "driver for ADV7183B get_camops\n");
+ return (&adv7183b_ops);
+
+}
+EXPORT_SYMBOL(get_camops);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("");
diff --git a/drivers/media/video/blackfin/adv7183b.h
b/drivers/media/video/blackfin/adv7183b.h
new file mode 100644
index 0000000..d404202
--- /dev/null
+++ b/drivers/media/video/blackfin/adv7183b.h
@@ -0,0 +1,85 @@
+/*
+ * File: drivers/media/video/blackfin/adv7183b.h
+ * Based on: drivers/media/video/blackfin/mt9v022.h
+ * Author: Taha Iali
+ *
+ * Created: may 2008
+ * Description: Command driver for Analog Devices ADV7183B sensor
+ *
+ *
+ * Modified:
+ * Copyright 2008 Taha Iali
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef ADV7183B_H
+#define ADV7183B_H
+
+#include "blackfin_cam.h"
+
+/*0 = VIDEO_PALETTE_GREY
+ 1 = VIDEO_PALETTE_RGB565
+ 2 = VIDEO_PALETTE_YUV422
+ 3 = VIDEO_PALETTE_UYVY */
+
+/* Hardware settings for BF561-EZKIT */
+//#define ADV7183B_GPIO_RESET GPIO_PF13
+//#define ADV7183B_GPIO_OE GPIO_PF2
+//#undef ADV7183B_28MHZ
+//#undef ADV7183B_STRONG
+
+/* Hardware settings for CeTT/MIS-SE PRESTO-Video */
+#undef ADV7183B_GPIO_RESET
+#define ADV7183B_GPIO_OE GPIO_PF8
+//#define ADV7183B_28MHZ
+#define ADV7183B_STRONG
+
+#define USE_ITU656
+#define DEFAULT_FORMAT 2
+
+# define POL_C 0x0000
+# define POL_S 0x0000
+# define PIXEL_PER_LINE 720
+# define LINES_PER_FRAME 576
+# define CFG_GP_Input_3Syncs 0x0000
+# define GP_Input_Mode 0x0000 /*ITU-R 656 Active Field Only*/
+# define PPI_DATA_LEN DLEN_8
+# define PPI_PACKING PACK_EN
+# define DMA_FLOW_MODE 0x0000 /* STOPMODE */
+# define DMA_WDSIZE_16 WDSIZE_16
+
+
+#define I2C_SENSOR_ID 0x40
+#define MAX_FRAME_WIDTH 720
+#define MAX_FRAME_HEIGHT 576
+#define MIN_FRAME_WIDTH 80
+#define MIN_FRAME_HEIGHT 60
+#define DEFAULT_DEPTH 16
+#define CORR_VAL 0
+
+#define ROW_OFF_MIN 4
+#define COL_OFF_MIN 1
+
+
+#define SENSOR_NAME "ADV7183B"
+
+struct bcap_camera_ops *get_camops(void);
+
+#define MAX_FRAMERATE 25
+
+
+#endif /* ADV7183B_H */
diff --git a/drivers/media/video/blackfin/blackfin_cam.c
b/drivers/media/video/blackfin/blackfin_cam.c
index cae2923..af1068e 100644
--- a/drivers/media/video/blackfin/blackfin_cam.c
+++ b/drivers/media/video/blackfin/blackfin_cam.c
@@ -77,6 +77,9 @@
#include "ov9655.h"
#endif
+#ifdef CONFIG_ADV7183B
+#include "adv7183b.h"
+#endif
#ifdef USE_GPIO
#define GPIO_SET_VALUE(x,y) gpio_set_value(x,y)
diff --git a/include/asm-blackfin/mach-bf561/cdefBF561.h
b/include/asm-blackfin/mach-bf561/cdefBF561.h
index b07ffcc..1707b9e 100644
--- a/include/asm-blackfin/mach-bf561/cdefBF561.h
+++ b/include/asm-blackfin/mach-bf561/cdefBF561.h
@@ -580,6 +580,18 @@ static __inline__ void bfin_write_VR_CTL(unsigned
int val)
#define bfin_write_EBIU_SDRRC(val) bfin_write16(EBIU_SDRRC,val)
#define bfin_read_EBIU_SDSTAT() bfin_read16(EBIU_SDSTAT)
#define bfin_write_EBIU_SDSTAT(val) bfin_write16(EBIU_SDSTAT,val)
+/* Parallel Peripheral Interface (PPI) is simply the same as PPI0 */
+#define bfin_read_PPI_CONTROL() bfin_read16(PPI0_CONTROL)
+#define bfin_write_PPI_CONTROL(val) bfin_write16(PPI0_CONTROL,val)
+#define bfin_read_PPI_STATUS() bfin_read16(PPI0_STATUS)
+#define bfin_write_PPI_STATUS(val) bfin_write16(PPI0_STATUS,val)
+#define bfin_clear_PPI_STATUS() bfin_read_PPI0_STATUS()
+#define bfin_read_PPI_COUNT() bfin_read16(PPI0_COUNT)
+#define bfin_write_PPI_COUNT(val) bfin_write16(PPI0_COUNT,val)
+#define bfin_read_PPI_DELAY() bfin_read16(PPI0_DELAY)
+#define bfin_write_PPI_DELAY(val) bfin_write16(PPI0_DELAY,val)
+#define bfin_read_PPI_FRAME() bfin_read16(PPI0_FRAME)
+#define bfin_write_PPI_FRAME(val) bfin_write16(PPI0_FRAME,val)
/* Parallel Peripheral Interface (PPI) 0 registers (0xFFC0 1000-0xFFC0
10FF) */
#define bfin_read_PPI0_CONTROL() bfin_read16(PPI0_CONTROL)
#define bfin_write_PPI0_CONTROL(val)
bfin_write16(PPI0_CONTROL,val)
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