Any chance you will/may/can share this example code to the rest of us? Not that it matters to me. We don't have a zIIP or zAAP.
-- John McKown Systems Engineer IV IT Administrative Services Group HealthMarkets(r) 9151 Boulevard 26 * N. Richland Hills * TX 76010 (817) 255-3225 phone * (817)-691-6183 cell [email protected] * www.HealthMarkets.com Confidentiality Notice: This e-mail message may contain confidential or proprietary information. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. HealthMarkets(r) is the brand name for products underwritten and issued by the insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance Company(r), Mid-West National Life Insurance Company of TennesseeSM and The MEGA Life and Health Insurance Company.SM > -----Original Message----- > From: IBM Mainframe Assembler List > [mailto:[email protected]] On Behalf Of Sam Siegel > Sent: Monday, October 18, 2010 12:20 PM > To: [email protected] > Subject: Re: Speciality TCBs > > On Sun, Oct 17, 2010 at 6:07 PM, Sam Siegel <[email protected]> wrote: > > > > On Sun, Oct 17, 2010 at 5:44 PM, William H. Blair > <[email protected]>wrote: > > > >> Sam Siegel explains: > >> > >> <--snip--> > > > It is extremely unlikely that you have accidentally > stumbled upon the > >> mechanism to make this little bit of magic happen. It is > always possible > >> that there is a bug in z/OS and your SRB is, in fact, > being dispatched on > >> a > >> zIIP. But I seriously doubt that. > >> > > > > Agreed, it could be a bug. But I've seen this in v1r9 and > v1r10. I'm not > > saying that there is certainty that the SRB is dispatched > to a zIIP all of > > the time. But it seems to happen extremely regularly. > > > > <--snip--> > > The SRB was modified to do a loop of about 420,000,000 > iterations. Inside > the loop was a STAP followed by a CLI to see which CPU was being used. > Based on the CPU, different counters were incremented. > There are 2 CPUs on > the system. > > The counter for cpu 0 is 44,300,650. > The counter for cpu 1 is 375,129,750. > > Below is the output from D M=CPU > > IEE174I 06.33.02 DISPLAY M FRAME 1 F E SYS=xxxx > PROCESSOR STATUS > ID CPU SERIAL > 00 + 02abcd9988 > 01 +I 12abcd9988 > > System name and serial numbers have been masked. > > <--snip--> > > > > > >> -- > >> WB > >> > > > > > >
