Unless I am thinking fuzzily, an interrupted MVCL leaves the PSW pointing to the MVCL (not past it) and the relevant registers incremented and decremented appropriately, so the supervisor may dispatch other tasks on the affected CPU, let them run as they will, and then resume the interrupted task when appropriate. The task will take off with the MVCL continuing from where it left off.
Charles -----Original Message----- From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On Behalf Of Paul Gilmartin Sent: Tuesday, October 20, 2020 3:02 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: Conditional MVCL macro? On 2020-10-20, at 14:58:52, Steve Smith wrote: > > There's actually a big difference between MVCL being interruptible, and > MVCLE stopping periodically before it's finished. The latter is not > interruptible, it just stops before completion periodically for the program > to do something else if it wants to. ... > I thought it was so that supervisor could dispatch another task. -- gil
