Is there code that has a zero base and non-zero index for something that might not be in common storage or in the primary AS? Wouldn't that cause problems in AR mode?
-- Shmuel (Seymour J.) Metz http://mason.gmu.edu/~smetz3 ________________________________________ From: IBM Mainframe Assembler List [[email protected]] on behalf of Peter Relson [[email protected]] Sent: Friday, January 22, 2021 10:54 AM To: [email protected] Subject: Re: Help with EZASMI assembly Gary W wrote: <snip> We had a MACLIB that contained ENDREQ,GET, ESTAEX, IDACB2, PUT all of which had L or ST instructions with an index and no base register which caused the assembly warning message. We didn't want to disable the warning because we wanted to catch our own errors. Just a cursory check indicates the GET still has a "L 15,24(1)". </snip> Jonathan Scott discovered that Flag(Page0) was changed in 2006 not to flag that case (a non-zero index register, without a base register). That is a very common technique when running in access register mode (although this case "could" have been coded back then as "...(1,0)" to avoid getting flagged). Peter Relson z/OS Core Technology Design
