On 2022-04-19 02:03, Don Higgins wrote:
What instructions take fixed quadword operas? I imagine some variant
of
Divide.
Yes, DLG and DLGR operate on 128 bit dividend in 64 bit r1 and r1+1.
But
since the dividend is in registers, there is no requirement for quad
word
alignment.
He is asking, how do you a specify a decimal dividend (128 bits)
that is to be loaded into these registers?
Don Higgins
[email protected]
www.don-higgins.net
-----Original Message-----
From: IBM Mainframe Assembler List <[email protected]> On
Behalf Of Paul Gilmartin
Sent: Monday, April 18, 2022 11:40 AM
To: [email protected]
Subject: Re: Quadword constant
On Apr 18, 2022, at 09:02:41, Schmitt, Michael wrote:
HLASM has fixed decimal constants for Halfwords, Fullwords,
Doublewords,
with appropriate alignment. Why is there none for Quadwords?
The closest I see is LQ, but that appears to be intended for floating
point.
What instructions take fixed quadword operands? I imagine some variant
of
Divide.
But it becomes increasingly absurd that a 64-bit machine is supported
by
only a 32-bit assembler.
