Tried BCT instruction and didn’t generate an error as well

 

Joe Reichman

Joe Reichman

Lead Developer Sam Golob Systems Programming LLC

71-28 163 St Apt 1A

Fresh Meadows NY 11365

 

From: Joseph Reichman <reichman...@gmail.com> 
Sent: Wednesday, February 26, 2025 9:53 AM
To: reichman...@gmail.com
Cc: ASSEMBLER-LIST@listserv.uga.edu
Subject: Re: BCTG Instruction

 

Tried BCT instruction and didn’t generate assembly error





On Feb 26, 2025, at 9:15 AM, reichman...@gmail.com 
<mailto:reichman...@gmail.com>  wrote:

 

John

 

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From: IBM Mainframe Assembler List <ASSEMBLER-LIST@LISTSERV.UGA.EDU 
<mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU> > on behalf of Seymour J Metz 
<sme...@gmu.edu <mailto:sme...@gmu.edu> >
Sent: Wednesday, February 26, 2025 9:15:04 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU <mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU>  
<ASSEMBLER-LIST@LISTSERV.UGA.EDU <mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU> >
Subject: Re: BCTG Instruction 

 

I suspect that is what he meant. Note that it's signed.

-- 
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3
עַם יִשְׂרָאֵל חַי
נֵ֣צַח יִשְׂרָאֵ֔ל לֹ֥א יְשַׁקֵּ֖ר



________________________________________
From: IBM Mainframe Assembler List <ASSEMBLER-LIST@LISTSERV.UGA.EDU 
<mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU> > on behalf of Binyamin Dissen 
<00001773bcccb823-dmarc-requ...@listserv.uga.edu 
<mailto:00001773bcccb823-dmarc-requ...@listserv.uga.edu> >
Sent: Wednesday, February 26, 2025 9:05 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU <mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU> 
Subject: Re: BCTG Instruction

External Message: Use Caution


Did you perhaps wish to use

    BRCTG

?

But that doesn't use a base register. The I2 field is the number of halfwords
offset from the instruction.

On Wed, 26 Feb 2025 07:51:39 -0500 Joe Reichman <reichman...@gmail.com 
<mailto:reichman...@gmail.com> > wrote:

:>Hi
:>
:>
:>My understanding of this new instruction is that it is a BCT with a new 20
:>bit displacement.
:>
:>The object code layout of this6 byte instruction has in bit 20 - 31 the 12
:>bit displacement and if the address exceeds 4096 decimal the new bit
:>displacement would get populated in bits
:>
:>32 - 40
:>
:>I tried out a BCTG R9,LONGDISP
:>
:>Where the address of longdisp was beyond 4096 and yet I don't see bits 32 -
:>40 of the instruction being populated
:>
:>  So here is the example
:>
:>LONGDISP is beyond 4,096 and in bits 31 - 40  there is zeros
:>
:>
:>00A0                                                   LONGDISP DS 0H
:>
:> 2E60      E390  00A0 00   46                           BCTG   R9,LONGDISP
:>

--
Binyamin Dissen <bdis...@dissensoftware.com <mailto:bdis...@dissensoftware.com> 
>
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