You could not code an executed relative instruction otherwise. Or at least, if otherwise, the assembler would have to know the one place it was executed from.
Charles -----Original Message----- From: IBM Mainframe Assembler List <ASSEMBLER-LIST@LISTSERV.UGA.EDU> On Behalf Of Paul Gilmartin Sent: Thursday, February 27, 2025 9:05 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: BCTG Instruction On 2/26/25 20:54, Robert Raicer wrote: > An important correction to the information provided by Jon Perryman > regarding how the branch address in the BRCT, BRCTG and BRCTH > instructions is computed. > > The RI field is a signed binary integer value which represents the > number of halfwords which is added to the address of the instruction > itself, NOT the address field of the PSW, to generate the branch > address. This type of address computation is the same for all > Relative Addressing instructions, not just for branching instructions, > when operand(s) locations are expressed using Relative Addressing (for > example, the second operand of the LOAD RELATIVE LONG instruction). > > In the general (common) case of instruction sequencing and execution, > the address field of the PSW and the address of the instruction itself > are the same. However, in the case of the EXECUTE instruction, the > address field of the PSW refers to the location of the EXECUTE > instruction, NOT the location of the instruction to be EXECUTEd (i.e., > the EXECUTE "target" address). > . How useful is that? -- gil
