On Mon, 20 Oct 2025 at 15:18, Robert Crawford < [email protected]> wrote:
> It's a S0C4 PIC 11. > Aha... > The failing instruction is "TM X'15',0(R3)" > > What's throwing me now is the IPCS "ST FAILDATA" command is showing a > translation exception address that is x'800' higher than the effective > operand address. Both the effective operand address and the exception > address are in key 8 and fetchable. > The TEA in zArch is not quite a TEA anymore - in fact it's officially the translation-exception identification (TEID) now. It contains only bits 0-51 of the (64-bit) address, and the low order bits now may contain other helpful information, depending on circumstances. This is all described in Chapter 3 "Storage" of the PofO. The bottom line is that at best you'll get the address of the exception rounded down to a page boundary. Tony H.
