Ya wanna see some really, really, really bad jitter, posing as something
really hot???

Here, follow this link:

http://focus.ti.com.cn/cn/lit/an/scaa088/scaa088.pdf

Look at the phase noise plots. You will notice that they are very proud
of how low the jitter is.

>From 10 kHz on up. Yeah, in case, they claim <1 pSec.

Too bad that they ignore everything below that.

*This is not low jitter! SPDIF can do better than this. -60 dBc @ 100
Hz is not low jitter.* It is horrible.

So, re-read what I have said earlier (paraphrased slightly):

"Our clocks have <5 pSec of jitter, at frequencies >1 kHz jitter
measurement."

What they don't say is much more important than what they do say.

Oh that TI chip.......similar to how they derive the clock in most DVD
players. One crystal, lots of frequencies. All PLL-derived.

Enjoy!

Pat

(BTW, thanks to one of my "spies" who ran across this on some hobbyist
forum somewhere. Not sure which one. All about as useless as the next.)


-- 
ar-t

http://www.analogresearch-technology.net
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