ar-t;372636 Wrote: > Well, I read 'em both. Yeah, not much mention of that, but I can > conclude (with a high degree of certainty) that both refer to *word > clock*. IOW, 44.1 kHz. If you look closely at the first paper, they > point out that everyone could hear 2 uSec of jitter. You simply can not > make a 256 Fs clock that bad. Thanks for taking the time to do this.
So... it seems that these papers are establishing some sort of ball-park threshold of audibility for word clock jitter. So here's the important question: when we see published specs for jitter on a transport's SPDIF output, which is it: word or bit clock jitter? Seems like it's crucial that we know the difference before we can even start guessing at whether it's a respectable figure. I realise that your personal interest is in reducing jitter on the clocks inside DACs, but to the man in the street that's not really important: he buys DAC X or DAC Y according to which sounds better. Whether the improvement is down to better analogue circuitry, lower internal jitter, or other factors (such as noise pickup from the environment) is frankly of no consequence to him: he's in no position to change it. -- cliveb Transporter -> ATC SCM100A ------------------------------------------------------------------------ cliveb's Profile: http://forums.slimdevices.com/member.php?userid=348 View this thread: http://forums.slimdevices.com/showthread.php?t=56425 _______________________________________________ audiophiles mailing list [email protected] http://lists.slimdevices.com/lists/listinfo/audiophiles
