mswlogo;558652 Wrote: > By feeding the clock back you eliminate clock drift between the two > components allowing a small reclocking buffer to eliminate jitter from > the source. If you have a reclocking buffer unless you have the clock > fed back or some sort of hand shake your buffer will underflow or > overflow. > >
I can't see why you're saying this. The way I read this is that you think the source ecomponent inherently has more jitter than a DAC reclocking circuit. It is NOT the case. It MAY be the case that one source component has less or more jitter than the DAC reclocking circuit. But that's up to the design of the components themselves, not some inherent property of the output of a DAC retiming circuit. Jitter is caused by physical properties of the clocking crystal, PCB layout, supply bypassing, the supply circuit, ground plane quality, yada yada yada. IF you get all these things right, your result is a low jitter regime. -- wayne325 ------------------------------------------------------------------------ wayne325's Profile: http://forums.slimdevices.com/member.php?userid=29916 View this thread: http://forums.slimdevices.com/showthread.php?t=79677 _______________________________________________ audiophiles mailing list [email protected] http://lists.slimdevices.com/mailman/listinfo/audiophiles
