On Agilex 5 with a firmware generated by Quartus 25.3, the dualport value in the handoff_table is correctly set to 0. In this case, the workaround is not necessary.
If the Agilex 5 is configured with dual port DDR access, the hack is not correct either, because while the firmware is configured for dual port, barebox would incorrectly initialize the IOSSM controller. Remove the hack. If the dualport issues become apparent, either use this as a test case to fix dualport support correctly or implement a proper workaround with documentation and warning. Signed-off-by: Michael Tretter <[email protected]> --- arch/arm/mach-socfpga/agilex5-sdram.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-socfpga/agilex5-sdram.c b/arch/arm/mach-socfpga/agilex5-sdram.c index 7a82dc6a6ad4..fa940958d104 100644 --- a/arch/arm/mach-socfpga/agilex5-sdram.c +++ b/arch/arm/mach-socfpga/agilex5-sdram.c @@ -94,14 +94,8 @@ static int populate_ddr_handoff(struct altera_sdram_plat *plat, struct io96b_inf /* Read handoff for DDR configuration */ socfpga_handoff_read((void *)SOC64_HANDOFF_SDRAM, handoff_table, len); - /* Read handoff - dual port - FIXME: Intel u-boot has a patch that HACKs this to 0 - https://github.com/altera-opensource/meta-intel-fpga-refdes/ \ - blob/master/recipes-bsp/u-boot/files/v1-0001-HSD-15015933655-ddr-altera-agilex5-Hack-dual-port-DO-NOT-MERGE.patch - Patch doesn't say why or what is broken here: handoff files? dualport RAM access? - */ - //plat->dualport = FIELD_GET(BIT(0), handoff_table[PORT_EMIF_CONFIG_OFFSET]); - plat->dualport = 0; + /* Read handoff - dual port */ + plat->dualport = FIELD_GET(BIT(0), handoff_table[PORT_EMIF_CONFIG_OFFSET]); pr_debug("%s: dualport from handoff: 0x%x\n", __func__, plat->dualport); if (plat->dualport) -- 2.47.3
