I verified that the bank select on UART0 is not necessary for the ddr_initialization. Thus, the documentation why the bank select is necessary is not valid anymore.
Furthermore, depending on the UART used by the board, using UART0 may not be general enough, anyway. It seems like the bank select rather added a delay before the SDRAM initialization and without the bank select, the serial didn't show anything because the SDRAM initialization failed. Remove the workaround. Signed-off-by: Michael Tretter <[email protected]> --- arch/arm/mach-socfpga/atf.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/arch/arm/mach-socfpga/atf.c b/arch/arm/mach-socfpga/atf.c index 6ddfef34632f..ac69fb7776ca 100644 --- a/arch/arm/mach-socfpga/atf.c +++ b/arch/arm/mach-socfpga/atf.c @@ -68,13 +68,6 @@ static void agilex5_el3_init(void) agilex5_initialize_security_policies(); pr_debug("Security policies initialized\n"); - /* - * need to set the bank select enable before the - * agilex5_ddr_init_full() otherwise the serial doesn't show - * anything. - */ - if (!IS_ENABLED(CONFIG_DEBUG_LL)) - writel(LCR_BKSE, SOCFPGA_UART0_ADDRESS + LCR); ret = agilex5_ddr_init_full(); if (ret) panic("DDR initialization failed\n"); -- 2.47.3
