From: Luca Lauro <[email protected]> --- arch/arm/boards/netgear-rn104/lowlevel.c | 43 +++++++++++++++++++++++++------- 1 file changed, 34 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boards/netgear-rn104/lowlevel.c b/arch/arm/boards/netgear-rn104/lowlevel.c index e693d13993..4fb5b6432b 100644 --- a/arch/arm/boards/netgear-rn104/lowlevel.c +++ b/arch/arm/boards/netgear-rn104/lowlevel.c @@ -1,24 +1,49 @@ // SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (C) 2014 Uwe Kleine-Koenig <[email protected]> - */ - #include <common.h> #include <asm/barebox-arm.h> -#include <mach/mvebu/barebox-arm-head.h> #include <mach/mvebu/lowlevel.h> +#include <mach/mvebu/barebox-arm-head.h> +#include <mach/mvebu/armada-370-xp-regs.h> extern char __dtb_armada_370_rn104_bb_start[]; -ENTRY_FUNCTION_MVEBU(start_netgear_rn104, r0, r1, r2) +#define INTERNAL_REG_BASE_ADDR 0x20080 + +static __always_inline void mvebu_remap_registers(void) +{ + void __iomem *base = mvebu_get_initial_int_reg_base(); + + writel(MVEBU_REMAP_INT_REG_BASE, base + INTERNAL_REG_BASE_ADDR); +} + +static unsigned long armada_370_xp_memory_find(void) { - void *fdt; + unsigned long mem_size = 0; + + for (int cs = 0; cs < 4; cs++) { + u32 ctrl = readl(ARMADA_370_XP_SDRAM_BASE + DDR_SIZE_CSn(cs)); + + /* Skip non-enabled CS */ + if ((ctrl & DDR_SIZE_ENABLED) != DDR_SIZE_ENABLED) + continue; + + mem_size += (ctrl | ~DDR_SIZE_MASK) + 1; + } - arm_cpu_lowlevel_init(); + return mem_size; +} + +ENTRY_FUNCTION_MVEBU(start_netgear_rn104, r0, r1, r2) +{ + void *fdt; + arm_cpu_lowlevel_init(); + fdt = __dtb_armada_370_rn104_bb_start + get_runtime_offset(); - armada_370_xp_barebox_entry(fdt); + mvebu_remap_registers(); + barebox_arm_entry(0, armada_370_xp_memory_find(), fdt); + // armada_370_xp_barebox_entry(fdt); } -- 2.47.3
