nmon clobbers s1-s3, but barebox_nmon_entry() is called from C, where
these registers are callee-saved. With NMON enabled, BeagleV thus starts
barebox proper with the 'q' that left nmon as hart ID. The upcoming
stage dispatch also keeps its state in these registers.
There may be no stack yet, so let's stash them in a4-a6, which neither
nmon nor the DEBUG_LL macros touch.
Fixes: 1e29b4d8024a ("RISC-V: make it possible to run nmon from PBL C code")
Assisted-by: Claude:opus-5.5
Signed-off-by: Ahmad Fatoum <[email protected]>
---
arch/riscv/boot/nmon_entry.S | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/riscv/boot/nmon_entry.S b/arch/riscv/boot/nmon_entry.S
index ae017d2a1cf5..54ff3d48d299 100644
--- a/arch/riscv/boot/nmon_entry.S
+++ b/arch/riscv/boot/nmon_entry.S
@@ -8,6 +8,13 @@
.section .text_bare_init
ENTRY(__barebox_nmon_entry)
+ /* nmon uses s1-s3, keep them in registers it leaves alone */
+ mv a4, s1
+ mv a5, s2
+ mv a6, s3
riscv_nmon
+ mv s1, a4
+ mv s2, a5
+ mv s3, a6
ret
ENDPROC(__barebox_nmon_entry)
--
2.47.3
