OpenSBI enters the D1 image like a kernel, so it uses the supervisor mode head, which stashes the hart ID in tp and records the device tree in a1 as entry data. The board init callback makes that the stage's board_data for pbl_stage_barebox_entry() to pass on. Memory region and stack top are unchanged.
Assisted-by: Claude:opus-5.5 Signed-off-by: Ahmad Fatoum <[email protected]> --- arch/riscv/boards/allwinner-d1/lowlevel.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/arch/riscv/boards/allwinner-d1/lowlevel.c b/arch/riscv/boards/allwinner-d1/lowlevel.c index 2b07a81edbfa..eb21662f5ea2 100644 --- a/arch/riscv/boards/allwinner-d1/lowlevel.c +++ b/arch/riscv/boards/allwinner-d1/lowlevel.c @@ -1,12 +1,22 @@ // SPDX-License-Identifier: GPL-2.0-only #include <common.h> -#include <debug_ll.h> +#include <pbl/entry.h> #include <asm/barebox-riscv.h> -#define DRAM_BASE 0x40000000 +#define DRAM_BASE 0x40000000UL -ENTRY_FUNCTION(start_allwinner_d1, a0, a1, a2) +/* OpenSBI passes on the device tree the SPL loaded */ +static void allwinner_d1_bdinit(unsigned long entry_data) { - barebox_riscv_supervisor_entry(DRAM_BASE, SZ_1G, a0, (void *)a1); + pbl_get_stage()->board_data = (void *)entry_data; } + +ENTRY_POINT_HEAD(start_allwinner_d1, __barebox_pbl_head_v1_supervisor) + .soc_type = SOC_TYPE_SUN20I_D1, + .second_stage.stacktop = DRAM_BASE + SZ_1G, + .second_stage.mem_start = DRAM_BASE, + .second_stage.mem_minsz = SZ_1G, + .second_stage.board_init = allwinner_d1_bdinit, + .second_stage.soc_chainload = pbl_stage_barebox_entry, +ENTRY_POINT_END -- 2.47.3
