The LiteX BIOS loads barebox into RAM and starts it in machine mode, so the image uses the machine mode head and the stage describes the RAM the old entry point passed to barebox_riscv_machine_entry().
nmon goes into the CPU init callback, which runs before relocation like the old entry point did. The '>' now comes from the stage dispatch. Assisted-by: Claude:opus-5.5 Signed-off-by: Ahmad Fatoum <[email protected]> --- arch/riscv/boards/litex-linux/lowlevel.c | 30 ++++++++++++++---------- 1 file changed, 17 insertions(+), 13 deletions(-) diff --git a/arch/riscv/boards/litex-linux/lowlevel.c b/arch/riscv/boards/litex-linux/lowlevel.c index 6be3d62e64fb..2d7713cd48fc 100644 --- a/arch/riscv/boards/litex-linux/lowlevel.c +++ b/arch/riscv/boards/litex-linux/lowlevel.c @@ -1,22 +1,26 @@ // SPDX-License-Identifier: GPL-2.0-only #include <common.h> +#include <pbl/entry.h> #include <asm/barebox-riscv.h> -#include <debug_ll.h> #include <asm/riscv_nmon.h> -ENTRY_FUNCTION(start_litex_linux, a0, a1, a2) +#define LITEX_RAM_BASE 0x40000000 + +extern char __dtb_z_litex_linux_start[]; + +static void __prereloc litex_cpu_init(void) { - extern char __dtb_z_litex_linux_start[]; - void *fdt; - - /* BIOS will have loaded us into RAM */ - barebox_nmon_entry(); - - putc_ll('>'); - - fdt = __dtb_z_litex_linux_start + get_runtime_offset(); - - barebox_riscv_machine_entry(0x40000000, SZ_256M, fdt); } + +/* BIOS will have loaded us into RAM */ +ENTRY_POINT_HEAD(start_litex_linux, __barebox_pbl_head_v1_machine) + .soc_type = SOC_TYPE_LITEX, + .second_stage.stacktop = LITEX_RAM_BASE + SZ_256M, + .second_stage.mem_start = LITEX_RAM_BASE, + .second_stage.mem_minsz = SZ_256M, + .second_stage.board_data = __dtb_z_litex_linux_start, + .second_stage.prereloc_cpu_init = litex_cpu_init, + .second_stage.soc_chainload = pbl_stage_barebox_entry, +ENTRY_POINT_END -- 2.47.3
