On Tuesday 08 April 2008 22:56:33 Michael Buesch wrote:
> On Tuesday 08 April 2008 21:11:04 Larry Finger wrote:
> > Michael,
> >
> > I'm gaining on my problems with 2 PCI (not Cardbus) cards, which are
> > as follows:
> >
> > 1. BCM4301 - With the ssb patch fixing IRQ TPS flag handling, I was
> > finally able to read beacons; however, no output interrupts were
> > delivered. By comparing the code in bcm43xx with that of b43legacy, I
> > found a section that had not been transferred. In it all bits are set
> > in B43legacy_MMIO_GEN_IRQ_REASON, the magic number 0x20402 is written
> > to B43legacy_MMIO_MACCTL, and the program spins waiting for IRQ_READY.
> > I was able to simplify the code to the following:
> >
> > b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
> > 0xFFFFFFFF);
> > b43legacy_write32(dev, B43legacy_MMIO_MACCTL, 0x00020402);
> > msleep(1);
> > b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
>
> _where_ is this code?
>
Oh I see. This is the code that waits for microcode init.
Well. In fact this code _has_ been transferred. It has just been un-magic'ed.
1623 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1624 B43legacy_IRQ_ALL);
1625
1626 /* Start the microcode PSM */
1627 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1628 macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1629 macctl |= B43legacy_MACCTL_PSM_RUN;
1630 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1631
1632 /* Wait for the microcode to load and respond */
1633 i = 0;
1634 while (1) {
1635 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1636 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1637 break;
1638 i++;
1639 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1640 b43legacyerr(dev->wl, "Microcode not
responding\n");
1641 b43legacy_print_fw_helptext(dev->wl);
1642 err = -ENODEV;
1643 goto error;
1644 }
1645 msleep_interruptible(50);
1646 if (signal_pending(current)) {
1647 err = -EINTR;
1648 goto error;
1649 }
1650 }
1651 /* dummy read follows */
1652 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
The macctl bits of the magic number are:
190 #define B43legacy_MACCTL_PSM_RUN 0x00000002
193 #define B43legacy_MACCTL_IHR_ENABLED 0x00000400
195 #define B43legacy_MACCTL_INFRA 0x00020000
So, well. I'd say the new code is identical. The IHR bit is set earlier.
The INFRA bit is just bogus to set here. We set it later when selecting
the operation mode. b43legacy_adjust_opmode()
The fact that the while-loop does exit without an error means that the microcode
does in fact run properly.
I'd probably print the value of the MACCTL register just after
the IRQ_REASON write.
--
Greetings Michael.
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