Michael Buesch wrote: > So, well. I'd say the new code is identical. The IHR bit is set earlier. > The INFRA bit is just bogus to set here. We set it later when selecting > the operation mode. b43legacy_adjust_opmode() > > The fact that the while-loop does exit without an error means that the > microcode > does in fact run properly. > > I'd probably print the value of the MACCTL register just after > the IRQ_REASON write.
I don't know what happened, but when I tested further, the extra test of the ucode running was not needed. I have some questions about the MACCTL register and phy->gmode. Should the GMODE bit in MACCTL only be set if the device has a G PHY, and should phy->gmode stay zero for my B-PHY device? Thanks, Larry _______________________________________________ Bcm43xx-dev mailing list Bcm43xx-dev@lists.berlios.de https://lists.berlios.de/mailman/listinfo/bcm43xx-dev
