On 03/02/2010 03:57 PM, Michael Buesch wrote: > A bug in the PCI-E core code is able to show such behavior, because all memory > transfers (MMIO and DMA) from the PCI device to the wireless core are > translated > by the PCI-E core. > I think the whole PCI-E core code has to be audited (also the specs, > probably).
I have nearly finished the update on the code section of the specs page at http://bcm-v4.sipsolutions.net/PCI-E. The part that is not done involves the sections that read an address from the SPROM and perform operations on that address. I found that the chip common registers are mapped at 12K for newer cores on PCIe. This explains the 0x3XXX addresses. Similarly, the PCIe registers are mapped at 8K - the 0x2XXX addresses. The SPROM is shadowed at 4K or 0x1XXX. Larry _______________________________________________ Bcm43xx-dev mailing list [email protected] https://lists.berlios.de/mailman/listinfo/bcm43xx-dev
