Re: [casper] the recapture bits are lost in ADC interface

[David George]

Hi Wan.

Firstly I'm assuming you are targeting ROACH...






configuring the ADCs)

Regards,
David George



--
David George
Digital Design Engineer
Karoo Array Telescope
Tel:     +27 21 531-7282
Fax:     +27 21 531-9761
Email:   david.geo...@ska.ac.za
Web:     www.ska.ac.za

It would probably be best to look at the synthesis/map logs before looking at the output NCD. The synthesis logs tend to be very telling when it comes to floating outputs etc. Generally speaking when things are optimized away it is an indication that the outputs are not being used, so I would check your simulink design and make absolutely sure you are actually using those signals. I can confirm that the code from SVN works, attached is a .mdl file for a design which outputs ADC data to 10Ge. Note the design will not work without support software to configure the ADC (currently there is no simple way of

Hi:

 adc_dataeveni_ddr: ddr_input port map (
  clk   => adc_clk,
  d     => adc_dataeveni(i),
  qrise => adc_datai_ddr(i + 24),
  qfall => adc_datai_ddr(i +  8)
 );
 adc_dataoddi_ddr: ddr_input port map (
  clk   => adc_clk,
  d     => adc_dataoddi(i),
  qrise => adc_datai_ddr(i + 16),
  qfall => adc_datai_ddr(i +  0)
 );

  clk   => adc_clk,
  d     => adc_dataevenq(i),
  qrise => adc_dataq_ddr(i + 24),
  qfall => adc_dataq_ddr(i +  8)
 );
 adc_dataoddq_ddr: ddr_input port map (
  clk   => adc_clk,
  d     => adc_dataoddq(i),
  qrise => adc_dataq_ddr(i + 16),
  qfall => adc_dataq_ddr(i +  0)
 );
end generate;

I am working with 10.1 library. For the following code in the adc_interface.vhd ADC_DATA_DDR: for i in adc_dataeveni'range generate adc_dataevenq_ddr: ddr_input port map ( I only could find bit 15 and 31 are generated in the post map NCD file. I guess all others bits are optimized out. I could not understand why. I could not solve this problem for a week. Anybody has seen this case? Thanks Wan

rawdata_machine.tar.gz
Description: application/gzip