On Mar 11, 2010, at 9:19 AM, Danny Price wrote:
G'day mateys
I've been investigating feeding the iADC directly with a
960-1440MHz signal; does anyone have any comments/advice about
doing so? I was planning on adding a 10dB attenuator at the input
of the iADC to combat standing waves.
From the Atmel spec sheet,
ADC settling time channel I or Q
(between 10% - 90% of output response) TS 170 ps
this roughly corresponds to a frequency limit of
(1/2 pi)(1/1.7E-10) = 940 MHz. So you can
expect a fair amount of distortion for input
signals > 1 GHz.