I am sorry. I mean the other ADC may be out
of phase with the FPGA clock.
> No. I want to have both ADC boards be of the
> same type. The new concern I have is that you
> express doubt that the yellow blocks will
> sync the two ADC's on our ROACH board. If one
> ADC is out of sync with the other, I expect
> the ADC generating the FPGA clock will be in
> sync but the other ADC may be 90, 180 or 270
> degrees out of phase with the first ADC. Do
> the yellow blocks sync the ADC's on a ROACH?
>
> I use a 2011 version of the CASPER library
> since upgrading has often caused the need to
> modify all my model designs.
>
>>
>> On May 3, 2013, at 12:09 PM, Dan Werthimer wrote:
>>
>>> the yellow block initialization checks the clock
>>> output from both adc's and resets one of
>>> the adc's until both clocks are synced up.
>>
>> I know this happened on the iBobs, but I'm not sure it is still the case
>> on the ROACH (or ROACH2).
>>
>> Ron, are you wanting to use two different kinds of ADC cards at the same
>> time on a single ROACH?
>>
>> Dave
>>
>>
>>
>
>
>
