Hi All, We have be trying to use ADC1x5000-8 with roach2 and we noticed that the sync signal has to be supplied after power up or power configuration. We would like to ask if it is possible to have that signal driven by the FPGA. If so, could you give me suggestions or comments on how to make it work? We deeply appreciate any help or suggestions.
Best, Ho-Cheung Ng -- Ho-Cheung Ng M.Phil. Candidate Computer Architecture and System Research (CASR) Lab Department of Electrical and Electronic Engineering The University of Hong Kong
