On Sun, Aug 31, 2014 at 3:40 PM, Rolando Paz <[email protected]> wrote:

> Hi again...
>
> I'm using a IBOB-QUADC, the FPGA clock rate is 200MHz, and QUADC clock
> rate is 200 MHz. The size of PFB and FFT is 2^11 pnts, and that means that
> I have 1024 channels for each of the four inputs of the QUADC, is this
> correct?
>
>
yes, that's correct:
2048 real points in and out of the PFB FIR, as well as into the FFT.
1024 complex points out of the FFT.



> My correlation block is called "xengine4", and within are 6
> cross-correlations and 4 autocorrelations. That means that I have 16 BRAM
> in the correlator's design. For each BRAM I use a "vacc_32bit" block .
>
> If the design can handle four real independent streams, as we have
> discussed, Does this means that I should set each "vacc_32bit" block with
> 1024 channels?
>

yes.


>
> Best Regards
>
> Rolando Paz
>
>
> 2014-08-31 11:33 GMT-06:00 Dan Werthimer <[email protected]>:
>
>>
>>
>> i think the FFT biplex real 2x block
>> can compute real to complex FFT's on
>> 4, 8, 12, 16.... inputs,  depending on how you set
>> the "Number simultaneous inputs" parameter.
>>
>> best wishes,
>>
>> dan
>>
>>
>>
>>
>>
>>
>>
>> On Sun, Aug 31, 2014 at 10:26 AM, Rolando Paz <[email protected]> wrote:
>>
>>> Hi Dan
>>>
>>> Now I understand :-)
>>>
>>> It's very different this:
>>>
>>> 4 time samples in parallel  (fft_wideband_real)
>>>
>>> 4 real streams  (fft_biplex_real_2x)
>>>
>>> Casper's website says (
>>> https://casper.berkeley.edu/wiki/Fft_biplex_real_2x):
>>>
>>> ...Thus, a biplex core (which can do 2 complex FFTs) can transform 4
>>> real streams. Twiddle factor, and other logic sharing, allows multiples of
>>> 4 input streams to be processed simultaneously with minimal resource
>>> increases...
>>>
>>> Does this mean that I only need a single block?
>>>
>>> Best Regards
>>>
>>> Rolando Paz
>>>
>>>
>>> 2014-08-31 11:06 GMT-06:00 Dan Werthimer <[email protected]>:
>>>
>>>>
>>>>
>>>> hi Rolando,
>>>>
>>>> the quad adc outputs one sample per FPGA clock,
>>>> so your correlator will need to use an FFT with real input,
>>>> complex output, 1 real input sample per clock.
>>>>
>>>> I think (but I'm not sure), the *fft_biplex_real_2x block does*
>>>> *two real to complex ffts, so you'll need*
>>>> *two of these blocks to compute four*
>>>> *fft's on four inputs.*
>>>>
>>>> *best wishes,*
>>>>
>>>> *dan*
>>>>
>>>>
>>>> On Sun, Aug 31, 2014 at 10:00 AM, Rolando Paz <[email protected]> wrote:
>>>>
>>>>> Could someone please explain why the QUADC designs use only the
>>>>> fft_bliplex_real_2x block?
>>>>>
>>>>> Why the fft_biplex_real_2x block uses more resources than the
>>>>> fft_wideband_real block?
>>>>>
>>>>> Best Regards
>>>>>
>>>>> Rolando Paz
>>>>>
>>>>
>>>>
>>>
>>
>

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