Hello all,
Question #1 : I am looking for a suitable CASPER library for 2 simultaneous input FFT library. (see bellow link) https://app.box.com/s/jqx5mp9dqkgyf5hijd3ztyjtspydktqq How to use simple FFT biplex to implement the same. Question #2: Is there anyone used this ADC16x250-8_coax_rev_2 card with ROACH 1 . https://casper.berkeley.edu/wiki/ADC16x250-8_coax_rev_2 The document says: * ROACH1 * The Virtex 5 FPGA, as used on the Roach1, has an LVDS interface to the ZDok+ connector pins that might not be able to run at speeds required to accept the ADC ICs' outputs at full rate. In practice we may need to limit the maximum speed to be 800 Mbps or so. We will push the maximum speed as high as possible but at some point we might need to cut our losses and move on. * When using this 16 input ADC card with a Roach1 the 3 operating modes MAY be restricted to something like : * 16 inputs by 200 MSPS by 8 bits * actual clock rates are : TBD * 8 inputs by 400 MSPS by 8 bits * actual clock rates are : TBD * 4 inputs by 800 MSPS by 8 bits * actual clock rates are : TBD * Actual maximum clock rates will only be found during the Yellow Block development and lab testing. * See the Roach2 section above - there may be some strange sample clock rate rules for the Roach1 too Looking for your comments is there any improvement, Do's and Dont's . Looking for your answers Thanks Indrajit
