Hello,
In Nançay, we deal with such high RFI, with a 8bits ADC. We
experienced no problem. It is to be noticed anyhow that we work with
analog filters that almost completely cut low frequencies, and have a
usually a smoother edge for hi freq. For some observations, we have
discretisation limits on one or the other side of our 550Mhz band, but
this does not impact science, as it only appears on the very side.
Note: we do not have any gain control.
Regards
Jean Borsenberger
On 08/12/17 02:02 AM, Xavier Bosch wrote:
Hi all,
Thank you for your comprehensive responses!
Changing the hardware increasing the number of bits might be the long
term solution.
The RFI power is 50 times (17 dB) the total power form the noise form
the whole times
We adjusted the total output power to make sure it does not clip the
samples at the ADC resulting to an standard deviation of 19 counts.
The RFI is not impulsive, it is constant.
I knew that correlators could operate using only the sign bit trough
the van-vleck correction and total-power denormalization, but I did
not know that this also applies to spectrometers. I will look into it.
Thank you again,
XB
On Thu, Dec 7, 2017 at 3:43 PM Dan Werthimer <[email protected]
<mailto:[email protected]>> wrote:
hi xavier,
we use 8 bit wideband digitizers at arecibo and parkes where the
RFI is fairly strong.
do you think you might be able to get away with 8 bits ? :
perhaps you know all this adc and dsp dynamic range stuff already,
but here are some thoughts:
an 8 bit digitizer usually works well if the total power of the
RFI doesn't exceed about 10 times the total power from the noise
from the whole band.
(eg: RFI can be incredibly strong if it's confined to a relatively
narrow band compared to the total band).
although this general rule doesn't apply if the RFI is impulsive
(see below).
have you studied the adc histogram from an 8 bit ADC at your site?
how often does the ADC saturate?
eg: if you set the signal level so the ADC RMS is around 5 (on a
scale from -128 to +127),
how often do you get -128 or +127?
if you have strong impulsive RFI that occasionally saturate the ADC.
there are some casper blocks that can excise these low duty cycle
events.
if the total power from the RFI is significantly stronger than the
noise power from the total band,
then you might consider using an 8 bit ADC, but only using the
sign bit from the ADC.
(use the ADC as a one bit digitzer, that outputs only +1 or -1).
you'll loose some SNR with a one bit digitizer (see
thompson/moran/swenson),
and you'll need to apply the van vleck correction to measure
strong signals accurately,
but you won't have a dynamic range problem with a one bit digitizer.
spectrometers and correlators can have 64 bits or more of dynamic
range with 8 bit or 1 bit digitizers.
(the digital part of your design can have lots of dynamic range,
independent of the ADC range).
but if the ADC saturates, and you don't handle the saturation
appropriately,
then you'll get spectral contamination no matter how many bits you
use in the post-adc signal processing).
best wishes,
dan
On Thu, Dec 7, 2017 at 2:10 PM, Xavier Bosch
<[email protected] <mailto:[email protected]>>
wrote:
Hi CASPERites,
We are developing a wideband spectrometer (~1.6 GHz ) in a
band that has a lot of RFI. Currently we are using the 8-bit
5-GSPS ASIAA ADC board and the ROACH2, and the ADC resolution
appears to be inadequate for our extreme RFI environment.
We would like to move over to a higher resolution ADC (12 to
14 bits), probably with a JESD204B interface, and a Xilinx
development kit. We are considering something like this
evaluation board KCU105
<https://www.xilinx.com/products/boards-and-kits/kcu105.html#hardware>and
something like FMC217
<https://www.vadatech.com/product.php?product=528&catid_prev=0&catid_now=0>
as a digitizer.
Has anyone been in a similar situation dealing with RFI?
Has anyone ported CASPER library to Xilinx development kits
and JESD204B ADCs?
Thank you,
XB
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