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commit 9cf62ee2f3bd02f0d4b5f37af7774c094d74a508 Author: raiden00pl <[email protected]> AuthorDate: Mon Sep 14 13:12:11 2026 +0200 boards/stm32c0/nucleo-c071rb: Add usb-cdc config add usb-cdc config for nucleo-c071rb Assisted-by: Claude Code Signed-off-by: raiden00pl <[email protected]> --- .../arm/stm32c0/boards/nucleo-c071rb/index.rst | 10 ++++- .../nucleo-c071rb/configs/usb-cdc/defconfig | 52 ++++++++++++++++++++++ boards/arm/stm32c0/nucleo-c071rb/include/board.h | 9 ++++ boards/arm/stm32c0/nucleo-c071rb/src/stm32_boot.c | 45 +++++++++++++++++++ .../arm/stm32c0/nucleo-c071rb/src/stm32_bringup.c | 14 ++++++ 5 files changed, 128 insertions(+), 2 deletions(-) diff --git a/Documentation/platforms/arm/stm32c0/boards/nucleo-c071rb/index.rst b/Documentation/platforms/arm/stm32c0/boards/nucleo-c071rb/index.rst index 3e83719bc25..6f7a65f2b86 100644 --- a/Documentation/platforms/arm/stm32c0/boards/nucleo-c071rb/index.rst +++ b/Documentation/platforms/arm/stm32c0/boards/nucleo-c071rb/index.rst @@ -6,8 +6,6 @@ ST Nucleo C071RB The Nucleo C071RB is a member of the Nucleo-64 board family. -USB not supported yet. - Buttons ======= @@ -29,6 +27,14 @@ Configures the NuttShell (nsh) located at apps/examples/nsh. The Configuration enables the serial interfaces on USART2. Support for builtin applications is disabled. +usb-cdc +------- + +Configures the NuttShell on USART2 and registers a CDC/ACM serial device +on CN13 during board bring-up. The device enumerates when connected to +the host. Run ``serdis`` to disconnect it and ``sercon`` to connect it +again. + jumbo ----- diff --git a/boards/arm/stm32c0/nucleo-c071rb/configs/usb-cdc/defconfig b/boards/arm/stm32c0/nucleo-c071rb/configs/usb-cdc/defconfig new file mode 100644 index 00000000000..8dbf7c629fc --- /dev/null +++ b/boards/arm/stm32c0/nucleo-c071rb/configs/usb-cdc/defconfig @@ -0,0 +1,52 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="nucleo-c071rb" +CONFIG_ARCH_BOARD_NUCLEO_C071RB=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32c0" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32C071RB=y +CONFIG_ARCH_CHIP_STM32C071XX=y +CONFIG_ARCH_CHIP_STM32C0=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=3997 +CONFIG_BUILTIN=y +CONFIG_CDCACM=y +CONFIG_CDCACM_RXBUFSIZE=256 +CONFIG_CDCACM_TXBUFSIZE=256 +CONFIG_DEBUG_FULLOPT=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INIT_STACKSIZE=1536 +CONFIG_INTELHEX_BINARY=y +CONFIG_LINE_MAX=64 +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=64 +CONFIG_NSH_READLINE=y +CONFIG_NUNGET_CHARS=0 +CONFIG_POSIX_SPAWN_DEFAULT_STACKSIZE=1536 +CONFIG_PTHREAD_MUTEX_UNSAFE=y +CONFIG_PTHREAD_STACK_DEFAULT=1536 +CONFIG_RAM_SIZE=24576 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=19 +CONFIG_START_MONTH=5 +CONFIG_START_YEAR=2013 +CONFIG_STDIO_DISABLE_BUFFERING=y +CONFIG_STM32_USART2=y +CONFIG_STM32_USB=y +CONFIG_SYSTEM_CDCACM=y +CONFIG_SYSTEM_NSH=y +CONFIG_TASK_NAME_SIZE=0 +CONFIG_USART2_SERIAL_CONSOLE=y diff --git a/boards/arm/stm32c0/nucleo-c071rb/include/board.h b/boards/arm/stm32c0/nucleo-c071rb/include/board.h index 48cc0f74eba..a0d7c324ea4 100644 --- a/boards/arm/stm32c0/nucleo-c071rb/include/board.h +++ b/boards/arm/stm32c0/nucleo-c071rb/include/board.h @@ -52,6 +52,15 @@ #define STM32_HSE_FREQUENCY STM32_BOARD_XTAL #define STM32_LSE_FREQUENCY 32768 /* X2 on board */ +/* HSIUSB48 is the only 48MHz USB clock source on STM32C0 and is trimmed + * by the CRS from the USB start of frame packet. + */ + +#ifdef CONFIG_STM32_USB +# define STM32_USE_CLK48 1 +# define STM32_HSI48_SYNCSRC SYNCSRC_USB +#endif + /* Configure HSI48 clock division factor (48 MHz) */ #define STM32_RCC_HSIDIV RCC_CR_HSIDIV_HSI diff --git a/boards/arm/stm32c0/nucleo-c071rb/src/stm32_boot.c b/boards/arm/stm32c0/nucleo-c071rb/src/stm32_boot.c index 8750e264317..7e4807d16c4 100644 --- a/boards/arm/stm32c0/nucleo-c071rb/src/stm32_boot.c +++ b/boards/arm/stm32c0/nucleo-c071rb/src/stm32_boot.c @@ -26,9 +26,16 @@ #include <nuttx/config.h> +#include <stdbool.h> + #include <nuttx/board.h> +#include <nuttx/irq.h> +#include <nuttx/usb/usbdev.h> #include <arch/board/board.h> +#include "arm_internal.h" +#include "hardware/stm32_usbdev.h" +#include "stm32_usbdev.h" #include "nucleo-c071rb.h" /**************************************************************************** @@ -61,6 +68,44 @@ void stm32_boardinitialize(void) #endif } +#if defined(CONFIG_STM32_USB) && defined(CONFIG_USBDEV) + +/**************************************************************************** + * Name: stm32_usbpullup + * + * Description: + * Drive the embedded DP pull-up, which connects the device to the host. + * + ****************************************************************************/ + +int stm32_usbpullup(struct usbdev_s *dev, bool enable) +{ + irqstate_t flags; + uint32_t regval; + + flags = enter_critical_section(); + regval = getreg32(STM32_USB_BCDR); + + if (enable) + { + regval |= USB_BCDR_DPPU; + } + else + { + regval &= ~USB_BCDR_DPPU; + } + + putreg32(regval, STM32_USB_BCDR); + leave_critical_section(flags); + + return OK; +} + +void stm32_usbsuspend(struct usbdev_s *dev, bool resume) +{ +} +#endif + /**************************************************************************** * Name: board_late_initialize * diff --git a/boards/arm/stm32c0/nucleo-c071rb/src/stm32_bringup.c b/boards/arm/stm32c0/nucleo-c071rb/src/stm32_bringup.c index d85f3e4d8d9..0cd7562b6da 100644 --- a/boards/arm/stm32c0/nucleo-c071rb/src/stm32_bringup.c +++ b/boards/arm/stm32c0/nucleo-c071rb/src/stm32_bringup.c @@ -50,6 +50,10 @@ # include "board_pwm.h" #endif +#ifdef CONFIG_CDCACM +# include <nuttx/usb/cdcacm.h> +#endif + #include <arch/board/board.h> #include "nucleo-c071rb.h" @@ -83,6 +87,16 @@ int stm32_bringup(void) stm32_iwdginitialize("/dev/watchdog0", STM32_LSI_FREQUENCY); #endif +#if defined(CONFIG_CDCACM) && !defined(CONFIG_CDCACM_CONSOLE) + /* Register the CDC/ACM device at boot. */ + + ret = cdcacm_initialize(0, NULL); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: cdcacm_initialize failed: %d\n", ret); + } +#endif + #if !defined(CONFIG_ARCH_LEDS) && defined(CONFIG_USERLED_LOWER) /* Register the LED driver */
