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commit 63ca8d1cbc4344f76ee1169c075a4b3657dc2fbf
Author: raiden00pl <[email protected]>
AuthorDate: Mon Sep 14 12:53:39 2026 +0200

    arch/arm/stm32: Add USBDEV_M0_V2 IP flag
    
    Gate the 32-bit USB DRD FS path of the common M0 usbdev driver on
    STM32_HAVE_IP_USBDEV_M0_V2 instead of the STM32G0 family symbol.
    
    Assisted-by: Claude Code
    Signed-off-by: raiden00pl <[email protected]>
---
 arch/arm/src/common/stm32/CMakeLists.txt           |  3 ++-
 arch/arm/src/common/stm32/Kconfig.have             |  3 +++
 arch/arm/src/common/stm32/Make.defs                |  3 ++-
 arch/arm/src/common/stm32/hardware/stm32_usbdev.h  |  4 ++-
 .../src/common/stm32/hardware/stm32_usbdev_m0.h    | 12 ++++-----
 arch/arm/src/common/stm32/stm32_usbdev_m0_v1.c     | 30 +++++++++++-----------
 arch/arm/src/stm32g0/Kconfig                       |  2 +-
 7 files changed, 32 insertions(+), 25 deletions(-)

diff --git a/arch/arm/src/common/stm32/CMakeLists.txt 
b/arch/arm/src/common/stm32/CMakeLists.txt
index cb4bb03fc8f..ac5c2c39ab2 100644
--- a/arch/arm/src/common/stm32/CMakeLists.txt
+++ b/arch/arm/src/common/stm32/CMakeLists.txt
@@ -450,7 +450,8 @@ if(CONFIG_ARCH_CORTEXM0)
     list(APPEND SRCS stm32_hsi48_m0_v1.c)
   endif()
 
-  if(CONFIG_STM32_USB AND CONFIG_STM32_HAVE_IP_USBDEV_M0_V1)
+  if(CONFIG_STM32_USB AND (CONFIG_STM32_HAVE_IP_USBDEV_M0_V1
+                           OR CONFIG_STM32_HAVE_IP_USBDEV_M0_V2))
     list(APPEND SRCS stm32_usbdev_m0_v1.c)
   endif()
 
diff --git a/arch/arm/src/common/stm32/Kconfig.have 
b/arch/arm/src/common/stm32/Kconfig.have
index 9f3ab9a9041..829b51534d0 100644
--- a/arch/arm/src/common/stm32/Kconfig.have
+++ b/arch/arm/src/common/stm32/Kconfig.have
@@ -1178,6 +1178,9 @@ config STM32_HAVE_USBDEV
 config STM32_HAVE_IP_USBDEV_M0_V1
        bool
 
+config STM32_HAVE_IP_USBDEV_M0_V2
+       bool
+
 config STM32_HAVE_IP_USBDEV_M3M4_V1
        bool
 
diff --git a/arch/arm/src/common/stm32/Make.defs 
b/arch/arm/src/common/stm32/Make.defs
index 729a00f342e..15aa2f05d9b 100644
--- a/arch/arm/src/common/stm32/Make.defs
+++ b/arch/arm/src/common/stm32/Make.defs
@@ -504,7 +504,8 @@ CHIP_CSRCS += stm32_hsi48_m0_v1.c
 endif
 
 ifeq ($(CONFIG_STM32_USB),y)
-ifeq ($(CONFIG_STM32_HAVE_IP_USBDEV_M0_V1),y)
+ifneq ($(filter y,$(CONFIG_STM32_HAVE_IP_USBDEV_M0_V1) \
+            $(CONFIG_STM32_HAVE_IP_USBDEV_M0_V2)),)
 CHIP_CSRCS += stm32_usbdev_m0_v1.c
 endif
 endif
diff --git a/arch/arm/src/common/stm32/hardware/stm32_usbdev.h 
b/arch/arm/src/common/stm32/hardware/stm32_usbdev.h
index ae78216c98a..126c3211b0b 100644
--- a/arch/arm/src/common/stm32/hardware/stm32_usbdev.h
+++ b/arch/arm/src/common/stm32/hardware/stm32_usbdev.h
@@ -28,11 +28,13 @@
  ****************************************************************************/
 
 #if (defined(CONFIG_STM32_HAVE_IP_USBDEV_M0_V1) + \
+     defined(CONFIG_STM32_HAVE_IP_USBDEV_M0_V2) + \
      defined(CONFIG_STM32_HAVE_IP_USBDEV_M3M4_V1)) > 1
 #  error Only one STM32 USB device IP version must be selected
 #endif
 
-#if defined(CONFIG_STM32_HAVE_IP_USBDEV_M0_V1)
+#if defined(CONFIG_STM32_HAVE_IP_USBDEV_M0_V1) || \
+    defined(CONFIG_STM32_HAVE_IP_USBDEV_M0_V2)
 #  include "hardware/stm32_usbdev_m0.h"
 #elif defined(CONFIG_STM32_HAVE_IP_USBDEV_M3M4_V1)
 #  include "hardware/stm32_usbdev_v1.h"
diff --git a/arch/arm/src/common/stm32/hardware/stm32_usbdev_m0.h 
b/arch/arm/src/common/stm32/hardware/stm32_usbdev_m0.h
index 9af1c4f14bd..24d67b35b1d 100644
--- a/arch/arm/src/common/stm32/hardware/stm32_usbdev_m0.h
+++ b/arch/arm/src/common/stm32/hardware/stm32_usbdev_m0.h
@@ -57,7 +57,7 @@
 #define STM32_USB_ISTR_OFFSET        0x0044  /* USB interrupt status register 
*/
 #define STM32_USB_FNR_OFFSET         0x0048  /* USB frame number register */
 #define STM32_USB_DADDR_OFFSET       0x004c  /* USB device address */
-#ifndef CONFIG_STM32_STM32G0
+#ifndef CONFIG_STM32_HAVE_IP_USBDEV_M0_V2
 #  define STM32_USB_BTABLE_OFFSET    0x0050  /* Buffer table address (16-bits) 
*/
 #endif
 #define STM32_USB_LPMCSR_OFFSET      0x0054  /* LPM control and status 
register */
@@ -65,7 +65,7 @@
 
 /* Buffer Descriptor Table (Relative to BTABLE address) */
 
-#ifdef CONFIG_STM32_STM32G0
+#ifdef CONFIG_STM32_HAVE_IP_USBDEV_M0_V2
 #  define STM32_USB_TX_WOFFSET       (0)     /* Transmission descriptor n 
(32-bits) */
 #  define STM32_USB_RX_WOFFSET       (4)     /* Reception descriptor n 
(32-bits) */
 #  define STM32_USB_BTABLE_RADDR(ep,o) \
@@ -99,7 +99,7 @@
 #define STM32_USB_ISTR               (STM32_USB_BASE + STM32_USB_ISTR_OFFSET)
 #define STM32_USB_FNR                (STM32_USB_BASE + STM32_USB_FNR_OFFSET)
 #define STM32_USB_DADDR              (STM32_USB_BASE + STM32_USB_DADDR_OFFSET)
-#ifndef CONFIG_STM32_STM32G0
+#ifndef CONFIG_STM32_HAVE_IP_USBDEV_M0_V2
 #  define STM32_USB_BTABLE           (STM32_USB_BASE + STM32_USB_BTABLE_OFFSET)
 #endif
 #define STM32_USB_LPMCSR             (STM32_USB_BASE + STM32_USB_LPMCSR_OFFSET)
@@ -107,7 +107,7 @@
 
 /* Buffer Descriptor Table (Relative to BTABLE address) */
 
-#ifdef CONFIG_STM32_STM32G0
+#ifdef CONFIG_STM32_HAVE_IP_USBDEV_M0_V2
 #  define STM32_USB_BTABLE_ADDR(ep,o) STM32_USB_BTABLE_RADDR(ep,o)
 #  define STM32_USB_TX(ep)           
STM32_USB_BTABLE_RADDR(ep,STM32_USB_TX_WOFFSET)
 #  define STM32_USB_RX(ep)           
STM32_USB_BTABLE_RADDR(ep,STM32_USB_RX_WOFFSET)
@@ -253,7 +253,7 @@
 
 /* Reception buffer address */
 
-#ifdef CONFIG_STM32_STM32G0
+#ifdef CONFIG_STM32_HAVE_IP_USBDEV_M0_V2
 #  define USB_ADDR_RX_SHIFT            (2)       /* Bits 15:2: Reception 
buffer address */
 #  define USB_ADDR_RX_MASK             (0x3fff << USB_ADDR_RX_SHIFT)
 #else
@@ -264,7 +264,7 @@
 
 /* Reception byte count */
 
-#ifdef CONFIG_STM32_STM32G0
+#ifdef CONFIG_STM32_HAVE_IP_USBDEV_M0_V2
 #  define USB_COUNT_RX_BL_SIZE         (1 << 31) /* Bit 31: Block size */
 #  define USB_COUNT_RX_NUM_BLOCK_SHIFT (26)      /* Bits 30-26: Number of 
blocks */
 #  define USB_COUNT_RX_SHIFT           (16)      /* Bits 25-16: Reception byte 
count */
diff --git a/arch/arm/src/common/stm32/stm32_usbdev_m0_v1.c 
b/arch/arm/src/common/stm32/stm32_usbdev_m0_v1.c
index d0bf8eae531..e226f52d7ca 100644
--- a/arch/arm/src/common/stm32/stm32_usbdev_m0_v1.c
+++ b/arch/arm/src/common/stm32/stm32_usbdev_m0_v1.c
@@ -357,7 +357,7 @@ static uint32_t stm32_getreg(uint32_t addr);
 static void stm32_putreg(uint32_t val, uint32_t addr);
 static void stm32_dumpep(int epno);
 #else
-#  ifdef CONFIG_STM32_STM32G0
+#  ifdef CONFIG_STM32_HAVE_IP_USBDEV_M0_V2
 #    define stm32_getreg(addr)     getreg32(addr)
 #    define stm32_putreg(val,addr) putreg32(val,addr)
 #  else
@@ -614,7 +614,7 @@ static uint32_t stm32_getreg(uint32_t addr)
 
   /* Read the value from the register */
 
-#ifdef CONFIG_STM32_STM32G0
+#ifdef CONFIG_STM32_HAVE_IP_USBDEV_M0_V2
   uint32_t val = getreg32(addr);
 #else
   uint32_t val = getreg16(addr);
@@ -676,7 +676,7 @@ static void stm32_putreg(uint32_t val, uint32_t addr)
 
   /* Write the value */
 
-#ifdef CONFIG_STM32_STM32G0
+#ifdef CONFIG_STM32_HAVE_IP_USBDEV_M0_V2
   putreg32(val, addr);
 #else
   putreg16(val, addr);
@@ -693,7 +693,7 @@ static void stm32_dumpep(int epno)
 {
   uint32_t addr;
 
-#ifdef CONFIG_STM32_STM32G0
+#ifdef CONFIG_STM32_HAVE_IP_USBDEV_M0_V2
   uinfo("CNTR:   %04" PRIx32 "\n", getreg32(STM32_USB_CNTR));
   uinfo("ISTR:   %04" PRIx32 "\n", getreg32(STM32_USB_ISTR));
   uinfo("FNR:    %04" PRIx32 "\n", getreg32(STM32_USB_FNR));
@@ -759,7 +759,7 @@ static void stm32_dumpep(int epno)
 
 static inline void stm32_seteptxcount(uint8_t epno, uint16_t count)
 {
-#ifdef CONFIG_STM32_STM32G0
+#ifdef CONFIG_STM32_HAVE_IP_USBDEV_M0_V2
   volatile uint32_t *epaddr = (uint32_t *)STM32_USB_TX(epno);
   *epaddr = (*epaddr & 0x0000ffff) | ((uint32_t)count << 16);
 #else
@@ -774,7 +774,7 @@ static inline void stm32_seteptxcount(uint8_t epno, 
uint16_t count)
 
 static inline void stm32_seteptxaddr(uint8_t epno, uint16_t addr)
 {
-#ifdef CONFIG_STM32_STM32G0
+#ifdef CONFIG_STM32_HAVE_IP_USBDEV_M0_V2
   volatile uint32_t *txaddr = (uint32_t *)STM32_USB_TX(epno);
   *txaddr = (*txaddr & 0xffff0000) | addr;
 #else
@@ -789,7 +789,7 @@ static inline void stm32_seteptxaddr(uint8_t epno, uint16_t 
addr)
 
 static inline uint16_t stm32_geteptxaddr(uint8_t epno)
 {
-#ifdef CONFIG_STM32_STM32G0
+#ifdef CONFIG_STM32_HAVE_IP_USBDEV_M0_V2
   volatile uint32_t *txaddr = (uint32_t *)STM32_USB_TX(epno);
 #else
   volatile uint16_t *txaddr = (uint16_t *)STM32_USB_ADDR_TX(epno);
@@ -803,7 +803,7 @@ static inline uint16_t stm32_geteptxaddr(uint8_t epno)
 
 static void stm32_seteprxcount(uint8_t epno, uint16_t count)
 {
-#ifdef CONFIG_STM32_STM32G0
+#ifdef CONFIG_STM32_HAVE_IP_USBDEV_M0_V2
   volatile uint32_t *epaddr = (uint32_t *)STM32_USB_RX(epno);
 #else
   volatile uint16_t *epaddr = (uint16_t *)STM32_USB_COUNT_RX(epno);
@@ -847,7 +847,7 @@ static void stm32_seteprxcount(uint8_t epno, uint16_t count)
       DEBUGASSERT(nblocks > 0 && nblocks < 0x1f);
       rxcount = (uint32_t)(nblocks << USB_COUNT_RX_NUM_BLOCK_SHIFT);
     }
-#ifdef CONFIG_STM32_STM32G0
+#ifdef CONFIG_STM32_HAVE_IP_USBDEV_M0_V2
   *epaddr = (*epaddr & 0x0000ffff) | rxcount;
 #else
   *epaddr = rxcount;
@@ -860,7 +860,7 @@ static void stm32_seteprxcount(uint8_t epno, uint16_t count)
 
 static inline uint16_t stm32_geteprxcount(uint8_t epno)
 {
-#ifdef CONFIG_STM32_STM32G0
+#ifdef CONFIG_STM32_HAVE_IP_USBDEV_M0_V2
   volatile uint32_t *epaddr = (uint32_t *)STM32_USB_RX(epno);
   return (uint16_t)((*epaddr & USB_COUNT_RX_MASK) >> 16);
 #else
@@ -875,7 +875,7 @@ static inline uint16_t stm32_geteprxcount(uint8_t epno)
 
 static inline void stm32_seteprxaddr(uint8_t epno, uint16_t addr)
 {
-#ifdef CONFIG_STM32_STM32G0
+#ifdef CONFIG_STM32_HAVE_IP_USBDEV_M0_V2
   volatile uint32_t *rxaddr = (uint32_t *)STM32_USB_RX(epno);
   *rxaddr = (*rxaddr & 0xffff0000) | addr;
 #else
@@ -890,7 +890,7 @@ static inline void stm32_seteprxaddr(uint8_t epno, uint16_t 
addr)
 
 static inline uint16_t stm32_geteprxaddr(uint8_t epno)
 {
-#ifdef CONFIG_STM32_STM32G0
+#ifdef CONFIG_STM32_HAVE_IP_USBDEV_M0_V2
   volatile uint32_t *rxaddr = (uint32_t *)STM32_USB_RX(epno);
 #else
   volatile uint16_t *rxaddr = (uint16_t *)STM32_USB_ADDR_RX(epno);
@@ -1114,7 +1114,7 @@ static inline bool stm32_eprxstalled(uint8_t epno)
 static void stm32_copytopma(const uint8_t *buffer,
                             uint16_t pma, uint16_t nbytes)
 {
-#ifdef CONFIG_STM32_STM32G0
+#ifdef CONFIG_STM32_HAVE_IP_USBDEV_M0_V2
   volatile uint32_t *dest;
 
   dest = (uint32_t *)(STM32_USBRAM_BASE + (uint32_t)pma);
@@ -1173,7 +1173,7 @@ static void stm32_copytopma(const uint8_t *buffer,
 static inline void
 stm32_copyfrompma(uint8_t *buffer, uint16_t pma, uint16_t nbytes)
 {
-#ifdef CONFIG_STM32_STM32G0
+#ifdef CONFIG_STM32_HAVE_IP_USBDEV_M0_V2
   volatile uint32_t *src;
 
   src = (uint32_t *)(STM32_USBRAM_BASE + (uint32_t)pma);
@@ -3654,7 +3654,7 @@ static void stm32_hwreset(struct stm32_usbdev_s *priv)
 
   /* Set the STM32 BTABLE address */
 
-#ifndef CONFIG_STM32_STM32G0
+#ifndef CONFIG_STM32_HAVE_IP_USBDEV_M0_V2
   stm32_putreg(STM32_BTABLE_ADDRESS & 0xfff8, STM32_USB_BTABLE);
 #endif
 
diff --git a/arch/arm/src/stm32g0/Kconfig b/arch/arm/src/stm32g0/Kconfig
index 56f67d39f80..facabd9d3f7 100644
--- a/arch/arm/src/stm32g0/Kconfig
+++ b/arch/arm/src/stm32g0/Kconfig
@@ -240,7 +240,7 @@ config STM32_STM32G0
        select STM32_HAVE_IP_TIMERS_M0_V1
        select STM32_HAVE_IP_USART_V4
        select STM32_HAVE_IP_WDG_M0_V1
-       select STM32_HAVE_IP_USBDEV_M0_V1 if STM32_HAVE_USBDEV
+       select STM32_HAVE_IP_USBDEV_M0_V2 if STM32_HAVE_USBDEV
        select STM32_HAVE_TIM1
        select STM32_HAVE_TIM3
        select STM32_HAVE_TIM14

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