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commit f7e950a674723a08164837ccb0d4786c65a470d6 Author: raiden00pl <[email protected]> AuthorDate: Fri Oct 30 11:44:58 2026 +0100 boards/nucleo-c562re: Define the LPTIM1 kernel clock. LPTIM1 runs on PCLK3, the reset value of RCC_CCIPR2 LPTIM1SEL. Signed-off-by: raiden00pl <[email protected]> Assisted-by: Claude Code --- boards/arm/stm32c5/nucleo-c562re/include/board.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/boards/arm/stm32c5/nucleo-c562re/include/board.h b/boards/arm/stm32c5/nucleo-c562re/include/board.h index 367f37c62a3..7c4d83849ae 100644 --- a/boards/arm/stm32c5/nucleo-c562re/include/board.h +++ b/boards/arm/stm32c5/nucleo-c562re/include/board.h @@ -88,6 +88,10 @@ #define STM32_TIM16_CLKIN STM32_PCLK2_FREQUENCY #define STM32_TIM17_CLKIN STM32_PCLK2_FREQUENCY +/* LPTIM1 kernel clock is PCLK3 (RCC_CCIPR2 LPTIM1SEL reset value) */ + +#define STM32_LPTIM1_CLKIN STM32_PCLK3_FREQUENCY + /* USART2 is connected to the ST-LINK virtual COM port. */ #define GPIO_USART2_RX GPIO_USART2_RX_1
