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commit 4721380859153c39a8ab0ad56bd502c437450436 Author: raiden00pl <[email protected]> AuthorDate: Fri Oct 30 09:25:24 2026 +0100 boards/arm/common/stm32: Register timer and oneshot devices from Kconfig. One option per TIM and LPTIM instance registers it from stm32_common_initialize() as /dev/timerN, /dev/oneshotN, /dev/lptimerN or /dev/lponeshotN, N being the instance number. Signed-off-by: raiden00pl <[email protected]> Assisted-by: Claude Code --- boards/arm/common/stm32/Kconfig | 188 ++++++++++++++++ boards/arm/common/stm32/include/board_timer.h | 38 ++++ boards/arm/common/stm32/src/CMakeLists.txt | 4 + boards/arm/common/stm32/src/Make.defs | 4 + boards/arm/common/stm32/src/board_common.c | 10 + boards/arm/common/stm32/src/board_timer.c | 302 ++++++++++++++++++++++++++ 6 files changed, 546 insertions(+) diff --git a/boards/arm/common/stm32/Kconfig b/boards/arm/common/stm32/Kconfig index 1c025f51839..ade593625dd 100644 --- a/boards/arm/common/stm32/Kconfig +++ b/boards/arm/common/stm32/Kconfig @@ -245,3 +245,191 @@ endchoice # "SPI BUS 3 Clock Mode" endif # STM32_SPI3_TEST endif # STM32_SPI_TEST + +menu "STM32 common timer devices" + +config BOARD_STM32_COMMON_TIM1_TIMER + bool "TIM1 /dev/timer1" + depends on TIMER && STM32_TIM1 + +config BOARD_STM32_COMMON_TIM1_ONESHOT + bool "TIM1 /dev/oneshot1" + depends on ONESHOT && STM32_ONESHOT && STM32_TIM1 && !BOARD_STM32_COMMON_TIM1_TIMER + +config BOARD_STM32_COMMON_TIM2_TIMER + bool "TIM2 /dev/timer2" + depends on TIMER && STM32_TIM2 + +config BOARD_STM32_COMMON_TIM2_ONESHOT + bool "TIM2 /dev/oneshot2" + depends on ONESHOT && STM32_ONESHOT && STM32_TIM2 && !BOARD_STM32_COMMON_TIM2_TIMER + +config BOARD_STM32_COMMON_TIM3_TIMER + bool "TIM3 /dev/timer3" + depends on TIMER && STM32_TIM3 + +config BOARD_STM32_COMMON_TIM3_ONESHOT + bool "TIM3 /dev/oneshot3" + depends on ONESHOT && STM32_ONESHOT && STM32_TIM3 && !BOARD_STM32_COMMON_TIM3_TIMER + +config BOARD_STM32_COMMON_TIM4_TIMER + bool "TIM4 /dev/timer4" + depends on TIMER && STM32_TIM4 + +config BOARD_STM32_COMMON_TIM4_ONESHOT + bool "TIM4 /dev/oneshot4" + depends on ONESHOT && STM32_ONESHOT && STM32_TIM4 && !BOARD_STM32_COMMON_TIM4_TIMER + +config BOARD_STM32_COMMON_TIM5_TIMER + bool "TIM5 /dev/timer5" + depends on TIMER && STM32_TIM5 + +config BOARD_STM32_COMMON_TIM5_ONESHOT + bool "TIM5 /dev/oneshot5" + depends on ONESHOT && STM32_ONESHOT && STM32_TIM5 && !BOARD_STM32_COMMON_TIM5_TIMER + +config BOARD_STM32_COMMON_TIM6_TIMER + bool "TIM6 /dev/timer6" + depends on TIMER && STM32_TIM6 + +config BOARD_STM32_COMMON_TIM6_ONESHOT + bool "TIM6 /dev/oneshot6" + depends on ONESHOT && STM32_ONESHOT && STM32_TIM6 && !BOARD_STM32_COMMON_TIM6_TIMER + +config BOARD_STM32_COMMON_TIM7_TIMER + bool "TIM7 /dev/timer7" + depends on TIMER && STM32_TIM7 + +config BOARD_STM32_COMMON_TIM7_ONESHOT + bool "TIM7 /dev/oneshot7" + depends on ONESHOT && STM32_ONESHOT && STM32_TIM7 && !BOARD_STM32_COMMON_TIM7_TIMER + +config BOARD_STM32_COMMON_TIM8_TIMER + bool "TIM8 /dev/timer8" + depends on TIMER && STM32_TIM8 + +config BOARD_STM32_COMMON_TIM8_ONESHOT + bool "TIM8 /dev/oneshot8" + depends on ONESHOT && STM32_ONESHOT && STM32_TIM8 && !BOARD_STM32_COMMON_TIM8_TIMER + +config BOARD_STM32_COMMON_TIM9_TIMER + bool "TIM9 /dev/timer9" + depends on TIMER && STM32_TIM9 + +config BOARD_STM32_COMMON_TIM9_ONESHOT + bool "TIM9 /dev/oneshot9" + depends on ONESHOT && STM32_ONESHOT && STM32_TIM9 && !BOARD_STM32_COMMON_TIM9_TIMER + +config BOARD_STM32_COMMON_TIM10_TIMER + bool "TIM10 /dev/timer10" + depends on TIMER && STM32_TIM10 + +config BOARD_STM32_COMMON_TIM10_ONESHOT + bool "TIM10 /dev/oneshot10" + depends on ONESHOT && STM32_ONESHOT && STM32_TIM10 && !BOARD_STM32_COMMON_TIM10_TIMER + +config BOARD_STM32_COMMON_TIM11_TIMER + bool "TIM11 /dev/timer11" + depends on TIMER && STM32_TIM11 + +config BOARD_STM32_COMMON_TIM11_ONESHOT + bool "TIM11 /dev/oneshot11" + depends on ONESHOT && STM32_ONESHOT && STM32_TIM11 && !BOARD_STM32_COMMON_TIM11_TIMER + +config BOARD_STM32_COMMON_TIM12_TIMER + bool "TIM12 /dev/timer12" + depends on TIMER && STM32_TIM12 + +config BOARD_STM32_COMMON_TIM12_ONESHOT + bool "TIM12 /dev/oneshot12" + depends on ONESHOT && STM32_ONESHOT && STM32_TIM12 && !BOARD_STM32_COMMON_TIM12_TIMER + +config BOARD_STM32_COMMON_TIM13_TIMER + bool "TIM13 /dev/timer13" + depends on TIMER && STM32_TIM13 + +config BOARD_STM32_COMMON_TIM13_ONESHOT + bool "TIM13 /dev/oneshot13" + depends on ONESHOT && STM32_ONESHOT && STM32_TIM13 && !BOARD_STM32_COMMON_TIM13_TIMER + +config BOARD_STM32_COMMON_TIM14_TIMER + bool "TIM14 /dev/timer14" + depends on TIMER && STM32_TIM14 + +config BOARD_STM32_COMMON_TIM14_ONESHOT + bool "TIM14 /dev/oneshot14" + depends on ONESHOT && STM32_ONESHOT && STM32_TIM14 && !BOARD_STM32_COMMON_TIM14_TIMER + +config BOARD_STM32_COMMON_TIM15_TIMER + bool "TIM15 /dev/timer15" + depends on TIMER && STM32_TIM15 + +config BOARD_STM32_COMMON_TIM15_ONESHOT + bool "TIM15 /dev/oneshot15" + depends on ONESHOT && STM32_ONESHOT && STM32_TIM15 && !BOARD_STM32_COMMON_TIM15_TIMER + +config BOARD_STM32_COMMON_TIM16_TIMER + bool "TIM16 /dev/timer16" + depends on TIMER && STM32_TIM16 + +config BOARD_STM32_COMMON_TIM16_ONESHOT + bool "TIM16 /dev/oneshot16" + depends on ONESHOT && STM32_ONESHOT && STM32_TIM16 && !BOARD_STM32_COMMON_TIM16_TIMER + +config BOARD_STM32_COMMON_TIM17_TIMER + bool "TIM17 /dev/timer17" + depends on TIMER && STM32_TIM17 + +config BOARD_STM32_COMMON_TIM17_ONESHOT + bool "TIM17 /dev/oneshot17" + depends on ONESHOT && STM32_ONESHOT && STM32_TIM17 && !BOARD_STM32_COMMON_TIM17_TIMER + +config BOARD_STM32_COMMON_LPTIM1_TIMER + bool "LPTIM1 /dev/lptimer1" + depends on TIMER && STM32_LPTIM1 + +config BOARD_STM32_COMMON_LPTIM1_ONESHOT + bool "LPTIM1 /dev/lponeshot1" + depends on ONESHOT && STM32_LPTIM1 && !BOARD_STM32_COMMON_LPTIM1_TIMER + +config BOARD_STM32_COMMON_LPTIM2_TIMER + bool "LPTIM2 /dev/lptimer2" + depends on TIMER && STM32_LPTIM2 + +config BOARD_STM32_COMMON_LPTIM2_ONESHOT + bool "LPTIM2 /dev/lponeshot2" + depends on ONESHOT && STM32_LPTIM2 && !BOARD_STM32_COMMON_LPTIM2_TIMER + +config BOARD_STM32_COMMON_LPTIM3_TIMER + bool "LPTIM3 /dev/lptimer3" + depends on TIMER && STM32_LPTIM3 + +config BOARD_STM32_COMMON_LPTIM3_ONESHOT + bool "LPTIM3 /dev/lponeshot3" + depends on ONESHOT && STM32_LPTIM3 && !BOARD_STM32_COMMON_LPTIM3_TIMER + +config BOARD_STM32_COMMON_LPTIM4_TIMER + bool "LPTIM4 /dev/lptimer4" + depends on TIMER && STM32_LPTIM4 + +config BOARD_STM32_COMMON_LPTIM4_ONESHOT + bool "LPTIM4 /dev/lponeshot4" + depends on ONESHOT && STM32_LPTIM4 && !BOARD_STM32_COMMON_LPTIM4_TIMER + +config BOARD_STM32_COMMON_LPTIM5_TIMER + bool "LPTIM5 /dev/lptimer5" + depends on TIMER && STM32_LPTIM5 + +config BOARD_STM32_COMMON_LPTIM5_ONESHOT + bool "LPTIM5 /dev/lponeshot5" + depends on ONESHOT && STM32_LPTIM5 && !BOARD_STM32_COMMON_LPTIM5_TIMER + +config BOARD_STM32_COMMON_LPTIM6_TIMER + bool "LPTIM6 /dev/lptimer6" + depends on TIMER && STM32_LPTIM6 + +config BOARD_STM32_COMMON_LPTIM6_ONESHOT + bool "LPTIM6 /dev/lponeshot6" + depends on ONESHOT && STM32_LPTIM6 && !BOARD_STM32_COMMON_LPTIM6_TIMER + +endmenu # STM32 common timer devices diff --git a/boards/arm/common/stm32/include/board_timer.h b/boards/arm/common/stm32/include/board_timer.h new file mode 100644 index 00000000000..ea527fb5efc --- /dev/null +++ b/boards/arm/common/stm32/include/board_timer.h @@ -0,0 +1,38 @@ +/**************************************************************************** + * boards/arm/common/stm32/include/board_timer.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_ARM_COMMON_STM32_INCLUDE_BOARD_TIMER_H +#define __BOARDS_ARM_COMMON_STM32_INCLUDE_BOARD_TIMER_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +int stm32_timer_setup(void); + +#endif /* __BOARDS_ARM_COMMON_STM32_INCLUDE_BOARD_TIMER_H */ diff --git a/boards/arm/common/stm32/src/CMakeLists.txt b/boards/arm/common/stm32/src/CMakeLists.txt index f54a7c0a5b2..75de0969f90 100644 --- a/boards/arm/common/stm32/src/CMakeLists.txt +++ b/boards/arm/common/stm32/src/CMakeLists.txt @@ -104,6 +104,10 @@ if(CONFIG_PWM AND NOT EXISTS ${NUTTX_BOARD_DIR}/src/stm32_pwm.c) list(APPEND SRCS board_pwm.c) endif() +if(CONFIG_TIMER OR CONFIG_ONESHOT) + list(APPEND SRCS board_timer.c) +endif() + if(CONFIG_SENSORS_INA219) list(APPEND SRCS stm32_ina219.c) endif() diff --git a/boards/arm/common/stm32/src/Make.defs b/boards/arm/common/stm32/src/Make.defs index 68505219878..01fb8b9deca 100644 --- a/boards/arm/common/stm32/src/Make.defs +++ b/boards/arm/common/stm32/src/Make.defs @@ -118,6 +118,10 @@ ifeq ($(CONFIG_PWM),y) endif endif +ifneq ($(CONFIG_TIMER)$(CONFIG_ONESHOT),) + CSRCS += board_timer.c +endif + ifeq ($(CONFIG_SENSORS_HALL3PHASE),y) CSRCS += board_hall3ph.c endif diff --git a/boards/arm/common/stm32/src/board_common.c b/boards/arm/common/stm32/src/board_common.c index 5073460b892..c66ed2fa8db 100644 --- a/boards/arm/common/stm32/src/board_common.c +++ b/boards/arm/common/stm32/src/board_common.c @@ -78,6 +78,10 @@ # include "stm32_cansock_setup.h" #endif +#if defined(CONFIG_TIMER) || defined(CONFIG_ONESHOT) +# include "board_timer.h" +#endif + #include "board_common.h" /**************************************************************************** @@ -226,6 +230,12 @@ int stm32_common_initialize(void) } #endif +#if defined(CONFIG_TIMER) || defined(CONFIG_ONESHOT) + /* Register the timer and oneshot devices selected in the board config */ + + stm32_timer_setup(); +#endif + UNUSED(ret); return OK; } diff --git a/boards/arm/common/stm32/src/board_timer.c b/boards/arm/common/stm32/src/board_timer.c new file mode 100644 index 00000000000..ed6d59c8908 --- /dev/null +++ b/boards/arm/common/stm32/src/board_timer.c @@ -0,0 +1,302 @@ +/**************************************************************************** + * boards/arm/common/stm32/src/board_timer.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <stdint.h> +#include <stdio.h> +#include <syslog.h> +#include <errno.h> + +#include <nuttx/timers/oneshot.h> + +#include "stm32_tim.h" +#include "stm32_oneshot.h" +#ifdef CONFIG_STM32_LPTIM +# include "stm32_lptim.h" +#endif +#include "board_timer.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define DEVPATH_MAX 32 +#define ONESHOT_RESOLUTION 1 /* TIM oneshot resolution in microseconds */ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +enum stm32_timer_dev_e +{ + DEV_TIMER, /* TIMn as /dev/timerN */ + DEV_ONESHOT, /* TIMn as /dev/oneshotN */ + DEV_LPTIMER, /* LPTIMn as /dev/lptimerN */ + DEV_LPONESHOT /* LPTIMn as /dev/lponeshotN */ +}; + +struct stm32_timer_dev_s +{ + uint8_t n; /* TIM or LPTIM instance */ + enum stm32_timer_dev_e dev; +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct stm32_timer_dev_s g_timer_devs[] = +{ +#ifdef CONFIG_BOARD_STM32_COMMON_TIM1_TIMER + { 1, DEV_TIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM1_ONESHOT + { 1, DEV_ONESHOT }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM2_TIMER + { 2, DEV_TIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM2_ONESHOT + { 2, DEV_ONESHOT }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM3_TIMER + { 3, DEV_TIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM3_ONESHOT + { 3, DEV_ONESHOT }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM4_TIMER + { 4, DEV_TIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM4_ONESHOT + { 4, DEV_ONESHOT }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM5_TIMER + { 5, DEV_TIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM5_ONESHOT + { 5, DEV_ONESHOT }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM6_TIMER + { 6, DEV_TIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM6_ONESHOT + { 6, DEV_ONESHOT }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM7_TIMER + { 7, DEV_TIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM7_ONESHOT + { 7, DEV_ONESHOT }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM8_TIMER + { 8, DEV_TIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM8_ONESHOT + { 8, DEV_ONESHOT }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM9_TIMER + { 9, DEV_TIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM9_ONESHOT + { 9, DEV_ONESHOT }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM10_TIMER + { 10, DEV_TIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM10_ONESHOT + { 10, DEV_ONESHOT }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM11_TIMER + { 11, DEV_TIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM11_ONESHOT + { 11, DEV_ONESHOT }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM12_TIMER + { 12, DEV_TIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM12_ONESHOT + { 12, DEV_ONESHOT }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM13_TIMER + { 13, DEV_TIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM13_ONESHOT + { 13, DEV_ONESHOT }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM14_TIMER + { 14, DEV_TIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM14_ONESHOT + { 14, DEV_ONESHOT }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM15_TIMER + { 15, DEV_TIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM15_ONESHOT + { 15, DEV_ONESHOT }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM16_TIMER + { 16, DEV_TIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM16_ONESHOT + { 16, DEV_ONESHOT }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM17_TIMER + { 17, DEV_TIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_TIM17_ONESHOT + { 17, DEV_ONESHOT }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_LPTIM1_TIMER + { 1, DEV_LPTIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_LPTIM1_ONESHOT + { 1, DEV_LPONESHOT }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_LPTIM2_TIMER + { 2, DEV_LPTIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_LPTIM2_ONESHOT + { 2, DEV_LPONESHOT }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_LPTIM3_TIMER + { 3, DEV_LPTIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_LPTIM3_ONESHOT + { 3, DEV_LPONESHOT }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_LPTIM4_TIMER + { 4, DEV_LPTIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_LPTIM4_ONESHOT + { 4, DEV_LPONESHOT }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_LPTIM5_TIMER + { 5, DEV_LPTIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_LPTIM5_ONESHOT + { 5, DEV_LPONESHOT }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_LPTIM6_TIMER + { 6, DEV_LPTIMER }, +#endif +#ifdef CONFIG_BOARD_STM32_COMMON_LPTIM6_ONESHOT + { 6, DEV_LPONESHOT }, +#endif +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_timer_setup + * + * Description: + * Register the timer and oneshot devices selected by the + * BOARD_STM32_COMMON_TIMn_* and BOARD_STM32_COMMON_LPTIMn_* options. + * A failing device is logged and does not stop the others. + * + ****************************************************************************/ + +int stm32_timer_setup(void) +{ + static const char * const names[] = + { + "timer", "oneshot", "lptimer", "lponeshot" + }; + +#ifdef CONFIG_ONESHOT + struct oneshot_lowerhalf_s *lower; +#endif + char devpath[DEVPATH_MAX]; + int ret = OK; + int tmp; + int i; + + for (i = 0; i < sizeof(g_timer_devs) / sizeof(g_timer_devs[0]); i++) + { + const struct stm32_timer_dev_s *d = &g_timer_devs[i]; + + snprintf(devpath, sizeof(devpath), "/dev/%s%d", names[d->dev], d->n); + tmp = -ENODEV; +#ifdef CONFIG_ONESHOT + lower = NULL; +#endif + + switch (d->dev) + { +#ifdef CONFIG_TIMER +# ifdef CONFIG_STM32_TIM + case DEV_TIMER: + tmp = stm32_timer_initialize(devpath, d->n); + break; +# endif + +# ifdef CONFIG_STM32_LPTIM + case DEV_LPTIMER: + tmp = stm32_lptim_timer_initialize(devpath, d->n); + break; +# endif +#endif + +#ifdef CONFIG_ONESHOT +# ifdef CONFIG_STM32_ONESHOT + case DEV_ONESHOT: + lower = oneshot_initialize(d->n, ONESHOT_RESOLUTION); + break; +# endif + +# ifdef CONFIG_STM32_LPTIM + case DEV_LPONESHOT: + lower = stm32_lptim_oneshot_initialize(d->n); + break; +# endif +#endif + + default: + break; + } + +#ifdef CONFIG_ONESHOT + if (lower != NULL) + { + tmp = oneshot_register(devpath, lower); + } +#endif + + if (tmp < 0) + { + syslog(LOG_ERR, "ERROR: %s failed: %d\n", devpath, tmp); + ret = tmp; + } + } + + return ret; +}
