xiaoxiang781216 commented on issue #8288: URL: https://github.com/apache/nuttx/issues/8288#issuecomment-1407063555
As far as I understand, the sharable attribute is only suitable for SMP system, which indicate that the memory will be accessed by multiple CPU concurrently and cache system must do the sync in hardware level. Since ARM never officially support SMP for armvx-m architecture, MPU_RASR_S doesn't make sense for cortex-m at all. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
