SunJun8 commented on code in PR #9103: URL: https://github.com/apache/nuttx/pull/9103#discussion_r1186594368
########## arch/risc-v/src/common/riscv_macros.S: ########## @@ -227,8 +222,15 @@ REGLOAD t0, REG_INT_CTX(\out) li t1, MSTATUS_FS and t2, t0, t1 - li t1, MSTATUS_FS_INIT - ble t2, t1, 1f + li t1, MSTATUS_FS_DIRTY + bne t2, t1, 1f + + /* Reset FS bit to MSTATUS_FS_CLEAN */ + li t1, MSTATUS_FS_CLEAN Review Comment: > 4. Thread 2 switch in use FPU and thread 1 FPU context(hardware register) is destroyed > 5. Thread 1 switch in again, but can't restore the FPU context During "5. Thread 1 switch in", the FS bit is in a clean state. Even if the FPU registers have been corrupted at this point, would it have any unknown impact on the possible execution of FPU instructions by Thread 1? -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
