pussuw commented on code in PR #9103: URL: https://github.com/apache/nuttx/pull/9103#discussion_r1186740366
########## arch/risc-v/src/common/riscv_macros.S: ########## @@ -227,8 +222,15 @@ REGLOAD t0, REG_INT_CTX(\out) li t1, MSTATUS_FS and t2, t0, t1 - li t1, MSTATUS_FS_INIT - ble t2, t1, 1f + li t1, MSTATUS_FS_DIRTY + bne t2, t1, 1f + + /* Reset FS bit to MSTATUS_FS_CLEAN */ + li t1, MSTATUS_FS_CLEAN Review Comment: Does it not do it now anyway? Not by increasing the size of the tcb, but every program needs a bigger stack ? Because on trap/exception entry, room for FPU regs is reserved whether FPU is used or not. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
