[GitHub] [incubator-tvm] Menooker commented on a change in pull request #5601: [TVM Core] Add bfloat16

[GitBox]

Menooker commented on a change in pull request #5601:
URL: https://github.com/apache/incubator-tvm/pull/5601#discussion_r427756975



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File path: src/target/llvm/codegen_llvm.cc
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@@ -555,12 +558,48 @@ void CodeGenLLVM::CreateSerialFor(llvm::Value* begin, 
llvm::Value* end, llvm::Va
   builder_->SetInsertPoint(for_end);
 }
 
+static llvm::Value* GetInt32VectorOrScalar(
+    llvm::IRBuilder<llvm::ConstantFolder, llvm::IRBuilderDefaultInserter>* 
builder, uint32_t v,
+    int lanes) {
+  if (lanes == 1) {
+    return builder->getInt32(v);
+  } else {
+    std::vector<llvm::Constant*> consts;
+    for (int i = 0; i < lanes; i++) {
+      consts.emplace_back(builder->getInt32(v));
+    }
+    return llvm::ConstantVector::get(consts);
+  }
+}
+
 // cast operatpr
 llvm::Value* CodeGenLLVM::CreateCast(DataType from, DataType to, llvm::Value* 
value) {
   llvm::Type* target = DTypeToLLVMType(to);
   if (value->getType() == target) return value;
   if (to.is_handle()) {
     return builder_->CreateBitCast(value, target);
+  } else if (to.is_float() && from.is_bfloat()) {
+    CHECK_EQ(from.bits(), 16);

Review comment:
       We are actually doing TIR=>TIR legalization pass in TVM. See 
src/tir/transforms/bf16_legalize.cc 




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