ZhennanQin commented on a change in pull request #5601:
URL: https://github.com/apache/incubator-tvm/pull/5601#discussion_r428486346
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File path: src/target/llvm/codegen_llvm.cc
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@@ -555,12 +558,48 @@ void CodeGenLLVM::CreateSerialFor(llvm::Value* begin,
llvm::Value* end, llvm::Va
builder_->SetInsertPoint(for_end);
}
+static llvm::Value* GetInt32VectorOrScalar(
+ llvm::IRBuilder<llvm::ConstantFolder, llvm::IRBuilderDefaultInserter>*
builder, uint32_t v,
+ int lanes) {
+ if (lanes == 1) {
+ return builder->getInt32(v);
+ } else {
+ std::vector<llvm::Constant*> consts;
+ for (int i = 0; i < lanes; i++) {
+ consts.emplace_back(builder->getInt32(v));
+ }
+ return llvm::ConstantVector::get(consts);
+ }
+}
+
// cast operatpr
llvm::Value* CodeGenLLVM::CreateCast(DataType from, DataType to, llvm::Value*
value) {
llvm::Type* target = DTypeToLLVMType(to);
if (value->getType() == target) return value;
if (to.is_handle()) {
return builder_->CreateBitCast(value, target);
+ } else if (to.is_float() && from.is_bfloat()) {
+ CHECK_EQ(from.bits(), 16);
Review comment:
There're 2 kinds of legalization:
1. TIR->TIR. TIR has full ability to describe any bfloat16 operation after
this PR. This legalization is introduced just because of hardware limitation
that current hardware only provide few bfloat16 operations. One day when
hardware has full instructions support with bfloat16, ideally this legalization
can be skipped. So this legalization is a target dependent pass.
2. TIR->LLVM IR. I guess this is the legalization that @tqchen mentions.
Because LLVM IR doesn't natively support bfloat16 , i16 will be used to replace
bfloat16. In this PR, I guess this is done within codegen_llvm, not by a
particular pass.
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